ADA4420-6
Rev. A | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 2
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the device soldered to a high thermal
conductivity 4-layer (2s2p) circuit board, as described in
EIA/JESD 51-7.
Table 3.
Package Type θ
JA
θ
JC
Unit
16-Lead QSOP 105 23 °C/W
20-Lead TSSOP 143 45 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4420-6
package is limited by the associated rise in junction temperature
(T
J
) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4420-6. Exceeding a
junction temperature of 150°C for an extended time can result
in changes in the silicon devices, potentially causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). The power dissipated due to load drive
depends on the particular application. For each output, the
power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to the loads is equal to the sum of the
power dissipations due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
.
Figure 2 shows the maximum power dissipation in the package
vs. the ambient temperature for the 16-lead QSOP (105°C/W)
and the 20-lead TSSOP (143°C/W) on a JEDEC standard 4-layer
board. θ
JA
values are approximate.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 102030405060708090100
07532-016
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
16-LEAD QSOP
20-LEAD TSSOP
Figure 2. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
ESD CAUTION
