ADN2892 Data Sheet
Rev. C | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
04986-002
NOTES
1. THERE IS AN EXPOSED PAD ON THE BOTTOM OF
THE
PACKAGE THAT MUST BE CONNECTED TO
THE GND PLANE WITH FILLED VIAS.
AVCC
PIN
NIN
AVEE
OUTP
DRVCC
OUTN
DRVEE
THRADJ
BW_SEL
LOS_INV
LOS
PD_VCC
PD_C
A
THODE
RSSI_OUT
SQUELCH
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
ADN2892
T
OP
VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic I/O Type
1
Description
1
AVCC
P
Analog Power Supply.
2 PIN AI Differential Data Input, Positive Port, 50 Ω On-Chip Termination.
3 NIN AI Differential Data Input, Negative Port, 50 Ω On-Chip Termination.
4 AVEE P Analog Ground.
5 THRADJ AO LOS Threshold Adjust Resistor.
6
BW_SEL
DI
With one 100 kΩ on-chip, pull-up resistor, BW_SEL = 0 for 1×/2× FC, BW_SEL = 1 for 4× FC.
7 LOS_INV DI With one 100 kΩ on-chip, pull-down resistor, LOS_INV = 1 inverts the LOS output
to be active low for SFF.
8 LOS DO LOS Detector Output, Open Collector.
9 DRVEE P Output Buffer Ground.
10 OUTN DO Differential Data Output, CML, Negative Port, 50 Ω, On-Chip Termination.
11
OUTP
DO
Differential Data Output, CML, Positive Port, 50 Ω, On-Chip Termination.
12 DRVCC P Output Buffer Power Supply.
13 SQUELCH DI Disable Outputs, 100 kΩ On-Chip, Pull-Down Resistor.
14 RSSI_OUT AO Average Current Output.
15 PD_VCC P Power Input for RSSI Measurement.
16 PD_CATHODE AO Photodiode Bias Voltage.
Exposed Pad Pad P Connect to Ground.
1
P = power; DI = digital input; DO = digital output; AI = analog input; and AO = analog output.
Data Sheet ADN2892
Rev. C | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
50ps/DIV
150mV/DIV
04986-012
Figure 3. Eye of ADN2892 at 25°C, 4.25 Gbps, and 10 mV Input
50ps/DIV
150mV/DIV
04986-023
Figure 4. Eye of ADN2892 at 95°C, 4.25 Gbps, and 10 mV Input
200ps/DIV
150mV/DIV
04986-010
Figure 5. Eye of ADN2892 at 25°C, 1.063 Gbps, and 10 mV Input (BW_SEL = 0)
0
04986-026
R
TH
()
TRIP AND RELEASE (V)
1k 100k
0.06
10k
0.05
0.04
0.03
0.02
0.01
–40C
+25C
+95C
ASSERTION
DEASSERTION
–40C
+25C
+95C
Figure 6. LOS Trip and Release vs. R
TH
at 4.25 Gbps
0
04986-027
R
TH
()
ELECTRICAL HYSTERESIS (dB)
1k 100k
8
10k
7
6
5
4
3
2
1
1GBPS
4.25GBPS
Figure 7. LOS Electrical Hysteresis vs. R
TH
at 25°C
16
0
04986-024
ELECTRICAL HYSTERESIS (dB)
SAMPLES
5.8
14
12
10
8
6
4
2
6.0 6.2 6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.6
Figure 8. Sample Lot Distribution—Worst-Case Condition:
Conditions = 4.25 Gbps, 100 kΩ at −40°C, 3.6 V
ADN2892 Data Sheet
Rev. C | Page 8 of 16
0
04986-028
RATE (Gbps)
JITTER (ps)
1.0 4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1.5 2.0 2.5 3.0 3.5 4.0
Figure 9. Random Jitter vs. Data Rate
0
04986-029
RATE (Gbps)
JITTER (ps)
1.0 4.5
18
16
14
12
10
8
6
4
2
1.5 2.0 2.5 3.0 3.5 4.0
Figure 10. Deterministic Jitter vs. Data Rate
70
0
100k
04986-016
SUPPLY-NOISE FREQUENCY
POWER SUPPLY-NOISE REJECTION (dB)
10M
60
50
40
30
20
10
1M
Figure 11. PSRR vs. Supply-Noise Frequency
1200
0
0
04986-017
PD_CATHODE CURRENT (PHOTODIODE CURRENT) (A)
RSSI OUTPUT CURRENT (A)
1000
800
600
400
200
200 400 600 800 1000
Figure 12. RSSI Output vs. Average Photodiode Current
60
0
0
04986-020
PD_CATHODE CURRENT (PHOTODIODE CURRENT) (A)
RSSI OUTPUT CURRENT (A)
50
40
30
20
10
10 20 30 40 50
Figure 13. RSSI Output vs. Average Photodiode Current (Zoomed)
–0.15
–0.70
04986-018
INPUT CURRENT (A)
COMPLIANCE VOLTAGE REFERRED TO VCC (V)
0 1000
–0.20
–0.25
–0.30
–0.35
–0.40
–0.45
–0.50
–0.55
–0.60
–0.65
100 200 300 400 500 600 700 800 900
Figure 14. PD_CATHODE Compliance Voltage vs.
Input Current RSSI (Refer to VCC)

ADN2892ACPZ-500RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Logarithmic Amplifiers 4.25Gbps Limiting Amplifier.I.C.
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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