7
LT1123
1123fb
The following assumptions were made in calculating the
data for the curves. Resistors are 5% tolerance and the
values shown on the curve are nominal.
For 20mA drive current assume:
V
BE
= 0.95V at I
C
= 1A
V
DRIVE
= 1.75V
For 50mA drive current assume:
V
BE
= 1.2V at I
C
= 2A
V
DRIVE
= 1.9V
For 120mA drive current assume:
V
BE
= 1.4V at I
C
= 4A
V
DRIVE
= 2.1V
The R
D
Selection Chart lists the recommended values for
R
D
for the most useful range of input voltage and output
current. The chart includes a number for power dissipa-
tion for the LT1123 and R
D
.
Current Limit
For regulator circuits using the LT1123, current limiting is
achieved by limiting the base drive to the external PNP
pass transistor. This means that the actual system current
limit will be a function of both the current limit of the
LT1123 and the Beta of the external PNP. Beta-based
current limit schemes are normally not practical because
of uncertainties in the Beta of the pass transistor. Here the
drive characteristics of the LT1123 combined with the
Beta characteristics of the MJE1123 can provide reliable
Beta-based current limiting. This is shown in Figure 5
where the current limit of 30 randomly selected transis-
tors is plotted. The spread of current limit is reasonably
well controlled.
5.5V R
D
120 43 ––
Power (LT1123) 0.05W 0.14W ––
Power (R
D
) 0.12W 0.32W ––
6.0V R
D
150 51 20
Power (LT1123) 0.05W 0.15W 0.37W
Power (R
D
) 0.13W 0.35W 0.76W
7.0V R
D
180 75 27
Power (LT1123) 0.06W 0.14W 0.38W
Power (R
D
) 0.16W 0.36W 0.89W
8.0V R
D
240 91 36
Power (LT1123) 0.06W 0.15W 0.38W
Power (R
D
) 0.17W 0.42W 0.97W
9.0V R
D
270 110 43
Power (LT1123) 0.20W 0.16W 0.41W
Power (R
D
) 0.07W 0.47W 1.11W
10.0V R
D
330 130 51
Power (LT1123) 0.22W 0.17W 0.43W
Power (R
D
) 0.07W 0.52W 1.25W
INPUT
VOLTAGE
0A to 4A
0.75V
OUTPUT CURRENT:
DROPOUT VOLTAGE:
0A to 1A
0.3V
0A to 2A
0.4V
R
D
Selection Chart
Note that in some conditions R
D
may be replaced with a
short. This is possible in circuits where an overload is
unlikely and the input voltage and drive requirements are
low. See the section on Thermal Considerations for more
information.
Figure 6. MJE1123 I
C
vs I
B
Figure 5. Short-Circuit Current for 30 Random Devices
OUTPUT CURRENT (A)
4.00
NUMBER OF UNITS
3
4
5
4.75 5.25 6.00
LT1123 F05
2
1
0
4.25 4.50
5.00
5.50 5.75
6
7
8
9
10
11
12
13
14
15
I
B
(A)
0
0
I
C
(A)
1
3
4
5
0.10
9
LT1123 F06
2
0.05 0.15
6
7
8
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8
LT1123
1123fb
The curve in Figure 6 can be used to determine the range
of current limit of an LT1123 regulator circuit using an
MJE1123 as a pass transistor. The curve was generated
using the Beta versus I
C
curve of the MJE1123. The
minimum and maximum value curves are extrapolated
from the minimum and maximum Beta specifications.
Thermal Conditions
The thermal characteristics of three components need to
be considered; the LT1123, the pass transistor and R
D
.
Power dissipation should be calculated based on the
worst-case conditions seen by each component during
normal operation.
The worst-case power dissipation in the LT1123 is a
function of drive current, supply voltage and the value of
R
D
. Worst-case dissipation for the LT1123 occurs when
the drive current is equal to approximately one half of its
maximum value. Figure 7 plots the worst-case power
dissipation in the LT1123 versus R
D
and V
IN
. The graph
was generated using the following formula:
P
V–V
4R
;R 10
D
IN BE
2
D
D
=
()
>
where:
V
BE
= the emitter/base voltage of the PNP pass
transistor (assumed to be 0.6V)
For some operating conditions R
D
may be replaced with a
short. This is possible in applications where the operating
requirements (input voltage and drive current) are at the
low end and the output will not be shorted. For R
D
= 0 the
following formula may be used to calculate the maximum
power dissipation in the LT1123.
P
D
= (V
IN
– V
BE
)(I
DRIVE
)
where:
V
IN
= maximum input voltage
V
BE
= emitter/base voltage of PNP
I
DRIVE
= required maximum drive current
The maximum junction temperature rise above ambient
for the LT1123 will be equal to the worst-case power
dissipation multiplied by the thermal resistance of the
device. The thermal resistance of the device will depend
upon how the device is mounted, and whether a heat sink
is used. Measurements show that one of the most effective
ways of heat sinking the TO-92 package is by utilizing the
PC board traces attached to the leads of the package. The
table below lists several methods of mounting and the
measured value of thermal resistance for each method. All
measurements were done in still air.
Package alone ............................................................................. 220°C/W
Package soldered into PC board with plated through
holes only ................................................................................ 175°C/W
Package soldered into PC board with 1/4 sq. in. of copper trace
per lead .................................................................................... 145°C/W
Package soldered into PC board with plated through holes in
board, no extra copper trace, and a clip-on type heat sink:
Thermalloy type 2224B .................................................... 160°C/W
Aavid type 5754 ................................................................ 135°C/W
The maximum operating junction temperature of the
LT1123 is 125°C. The maximum operating ambient tem-
perature will be equal to 125°C minus the maximum
junction temperature rise above ambient.
The worst-case power dissipation in R
D
needs to be
calculated so that the power rating of the resistor can be
determined. The worst-case power in the resistor will
occur when the drive current is at a maximum. Figure 8
plots the required power rating of R
D
versus supplyFigure 7. Power in LT1123
V
IN
(V)
6
R
D
()
8
1k
LT1123 F07
10
100
715
14
131211
10
9
5
0.4W
0.7W
0.1W
0.2W
0.3W
0.5W
THERMAL
RESISTANCE
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9
LT1123
1123fb
voltage and resistor value. Power dissipation can be
calculated using the following formula:
P
V–V V
R
RD
IN BE DRIVE
2
=
()
where:
V
BE
= emitter/base voltage of the PNP pass transistor
V
DRIVE
= voltage at the drive pin of the LT1123
= V
SAT
of the drive pin in the worst case
The worst-case power dissipation in the PNP pass transis-
tor is simply equal to:
P
MAX
= (V
IN
– V
OUT
)(I
OUT
)
where
V
IN
= Maximum V
IN
I
OUT
= Maximum I
OUT
The thermal resistance of the MJE1123 is equal to:
70°C/W Junction to Ambient (no heat sink)
1.67°C/W Junction to Case
The PNP will normally be attached to either a chassis or a
heat sink so the actual thermal resistance from junction to
ambient will be the sum of the PNP’s junction to case
thermal resistance and the thermal resistance of the heat
sink or chassis. For nonstandard heat sinks the user will
need to determine the thermal resistance by experiment.
The maximum junction temperature rise above ambient
for the PNP pass transistor will be equal to the maximum
power dissipation times the thermal resistance, junction
to ambient, of the PNP. The maximum operating junction
temperature of the MJE1123 is 150°C. The maximum
operating ambient temperature for the MJE1123 will be
equal to 150°C minus the maximum junction temperature
rise.
The SOT-223 package is designed to be surface mounted.
Heat sinking is accomplished by using the heat spreading
capabilities of the PC board and its copper traces. The
thermal resistance from junction to ambient can be as low
as 50°C/W. This requires a reasonably sized PC board with
at least one layer of copper to spread the heat across the
board and couple it into the surrounding air.
The table below can be used as a guideline in estimating
thermal resistance. Data for the table was generated using
1/16" FR-4 board with 1oz copper foil.
Table 1.
Copper Area
Thermal Resistance
Topside* Backside Board Area (Junction to Ambient)
2500 sq. mm 2500 sq. mm 2500 sq. mm 50°C/W
1000 sq. mm 2500 sq. mm 2500 sq. mm 50°C/W
225 sq. mm 2500 sq. mm 2500 sq. mm 58°C/W
100 sq. mm 2500 sq. mm 2500 sq. mm 64°C/W
1000 sq. mm 1000 sq. mm 1000 sq. mm 57°C/W
1000 sq. mm 0 1000 sq. mm 60°C/W
* Tab of device attached to topside copper
For the LT1123 the tab is ground so that plated through
holes can be used to couple the tab both electrically and
thermally to the ground plane layer of the board. This will
help to lower the thermal resistance.
Thermal Limiting
The thermal limit of the LT1123 can be used to protect both
the LT1123 and the PNP pass transistor. This is accom-
plished by thermally coupling the LT1123 to the power
transistor. There are clip type heat sinks available for the
TO-92 package that will allow the LT1123 to be mounted
to the same heat sink as the PNP pass transistor. One
example is manufactured by IERC (part #RUR67B1CB).
The LT1123 should be mounted as close as possible to the
Figure 8. Power in R
D
V
IN
(V)
6
R
D
()
8
1k
LT1123 F08
10
100
715
14
131211
10
9
5
1W
0.5W
0.25W
2W
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LT1123CST#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Linear Voltage Regulators Low Dropout Reg Driver
Lifecycle:
New from this manufacturer.
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