LT3475/LT3475-1
13
3475fb
Table 4. Schottky Diodes
V
R
(V)
I
AVE
(A)
(A)
V
F
at 1A
(mV)
V
F
at 2A
(mV)
On Semiconductor
MBR0540 40 0.5 620
MBRM120E 20 1 530
MBRM140 40 1 550
Diodes Inc
B120 20 1 500
B130 30 1 500
B140HB 40 1 530
DFLS140 40 1.1 510
B240 40 2 500
International Rectifi er
10BQ030 30 1 420
BOOST Pin Considerations
The capacitor and diode tied to the BOOST pin gener-
ate a voltage that is higher than the input voltage. In
most cases, a 0.22μF capacitor and fast switching diode
(such as the CMDSH-3 or MMSD914LT1) will work well.
Figure 5 shows three ways to arrange the boost circuit.
The BOOST pin must be more than 2.5V above the SW
pin for full effi ciency. For outputs of 3.3V and higher, the
standard circuit (Figure 5a) is best. For outputs between
2.8V and 3.3V, use a small Schottky diode (such as the
BAT-54). For lower output voltages, the boost diode can be
tied to the input (Figure 5b). The circuit in Figure 5a is more
effi cient because the BOOST pin current comes from a
lower voltage source. The anode of the boost diode can
be tied to another source that is at least 3V. For example, if
you are generating a 3.3V output, and the 3.3V output is on
whenever the LED is on, the BOOST pin can be
connected to the 3.3V output. For LT3475-1 applications
with higher output voltages, an additional Zener diode
may be necessary (Figure 5d) to maintain pin voltage
below the absolute maximum. In any case, be sure that
the maximum voltage at the BOOST pin is both less than
60V and the voltage difference between the BOOST and
SW pins is less than 30V.
The minimum operating voltage of an LT3475 application
is limited by the undervoltage lockout (~3.7V) and by the
maximum duty cycle. The boost circuit also limits the
minimum input voltage for proper start up. If the input
voltage ramps slowly, or the LT3475 turns on when the
output is already in regulation, the boost capacitor may
not be fully charged. Because the boost capacitor charges
Figure 5. Generating the Boost Voltage
V
IN
BOOST
GND
SW
V
IN
LT3475
(5a)
D2
V
OUT
C3
V
BOOST
– V
SW
V
OUT
MAX V
BOOST
V
IN
+ V
OUT
V
IN
BOOST
GND
SW
V
IN
LT3475
(5b)
D2
V
OUT
C3
V
BOOST
– V
SW
V
IN
MAX V
BOOST
2V
IN
D2
V
IN
BOOST
GND
SW
V
IN
LT3475
(5c)
3475 F05
V
OUT
V
BOOST
– V
SW
V
IN2
MAX V
BOOST
V
IN2
+ V
IN
MINIMUM VALUE FOR V
IN2
=
3V
V
IN2
> 3V
C3
D2
V
IN
BOOST
GND
SW
V
IN
LT3475
(5d)
3475 F05
V
OUT
V
BOOST
– V
SW
– V
Z
MAX V
BOOST
V
IN
+ V
OUT
– V
Z
C3
APPLICATIONS INFORMATION
LT3475/LT3475-1
14
3475fb
with the energy stored in the inductor, the circuit will rely
on some minimum load current to get the boost circuit
running properly. This minimum load will depend on input
and output voltages, and on the arrangement of the boost
circuit. The minimum load current generally goes to zero
once the circuit has started. The typical performance char-
acteristics section shows a plot of minimum load to start
and to run as a function of input voltage. Even without an
output load current, in many cases the discharged output
capacitor will present a load to the switcher that will allow
it to start. The plots show the worst case, where V
IN
is
ramping very slowly.
Programming LED Current
The LED current can be set by adjusting the voltage on the
V
ADJ
pin. For a 1.5A LED current, either tie V
ADJ
to REF or
to a 1.25V source. For lower output currents, program the
V
ADJ
using the following formula: I
LED
= 1.5A • V
ADJ
/1.25V.
Voltages less than 1.25V can be generated with a voltage
divider from the REF pin, as shown in Figure 6. In order
to have accurate LED current, precision resistors are
preferred (1% or better is recommended). Note that the
V
ADJ
pin sources a small amount of bias current, so use
the following formula to choose resistors:
R2 =
V
ADJ
1.25V V
ADJ
R1
+ 50nA
To minimize the error from variations in V
ADJ
pin current,
use resistors with a parallel resistance of less than 4k. Use
resistor strings with a high enough series resistance so as not
to exceed the 500μA current compliance of the REF pin.
Dimming Control
There are several different types of dimming control
circuits. One dimming control circuit (Figure 7) changes
the voltage on the V
ADJ
pin by tying a low on resistance
FET to the resistor divider string. This allows the se-
lection of two different LED currents. For reliable op-
eration program an LED current of no less than 50mA.
The maximum current dimming ratio (I
RATIO
) can be
calculated from the maximum LED current (I
MAX
) and the
minimum LED current (I
MIN
) as follows:
I
MAX
/I
MIN
= I
RATIO
Another dimming control circuit (Figure 8) uses the PWM
pin and an external NFET tied to the cathode of the LED.
An external PWM signal is applied to the PWM pin and the
gate of the NFET (For PWM dimming ratios of 20 to 1 or
less, the NFET can be omitted). The average LED current is
proportional to the duty cycle of the PWM signal. When the
PWM signal goes low, the NFET turns off, turning off the
LED and leaving the output capacitor charged. The PWM
pin is pulled low as well, which disconnects the V
C
pin,
storing the voltage in the capacitor tied there. Use the C-RC
string shown in Figure 8 and Figure 9 tied to the V
C
pin for
proper operation during startup. When the PWM pin goes
high again, the LED current returns rapidly to its previous
on state since the compensation and output capacitors are
at the correct voltage. This fast settling time allows the
PWM
LED
GND
LT3475
3475 F08
PWM
100Hz TO
10kHz
V
C
10k
0.1μF
3.3nF
Figure 8. Dimming Using PWM Signal
REF
V
ADJ
GND
LT3475
3475 F07
R1
R2
DIM
Figure 7. Dimming with a MOSFET and Resistor Divider
Figure 6. Setting V
ADJ
with a Resistor Divider
REF
V
ADJ
GND
LT3475
3475 F06
R1
R2
APPLICATIONS INFORMATION
LT3475/LT3475-1
15
3475fb
Figure 10. Recommended Component Placement
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
3475 F10
V
IN
PWM2SHDNPWM1
VIA TO LOCAL GND PLANE
R
T
V
C
GND
LT3475
3475 F09
1M
R
T
10k
220pF
0.1μ
F
PWM1
3.3nF
Figure 9. Extending the PWM Dimming Range
LT3475 to maintain diode current regulation with PWM
pulse widths as short as 7.5 switching cycles (12.5μs for
f
SW
= 600kHz). Maximum PWM period is determined by
the system and is unlikely to be longer than 12ms. Using
PWM periods shorter than 100μs is not recommended.
The maximum PWM dimming ratio (PWM
RATIO
) can be
calculated from the maximum PWM period (t
MAX
) and
minimum PWM pulse width (t
MIN
) as follows:
t
MAX
/t
MIN
= PWM
RATIO
Total dimming ratio (DIM
RATIO
) is the product of the PWM
dimming ratio and the current dimming ratio.
Example:
I
MAX
= 1A, I
MIN
= 0.1A, t
MAX
= 9.9ms
t
MIN
= 3.3μs (f
SW
= 1.4MHz)
I
RATIO
= 1A/0.1A =10:1
PWM
RATIO
= 9.9ms/3.3μs = 3000:1
DIM
RATIO
= 10 • 3000 = 30000:1
To achieve the maximum PWM dimming ratio, use the
circuit shown in Figure 9. This allows PWM pulse widths
as short as 4.5 switching cycles (7.5μs for f
SW
= 600kHz).
Note that if you use the circuit in Figure 9, the rising edge
of the two PWM signals must align within 100ns.
Layout Hints
As with all switching regulators, careful attention must
be paid to the PCB layout and component placement. To
maximize effi ciency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switching path is essential. The voltage signal of the SW
and BOOST pins have sharp rise and fall edges. Minimize
the area of all traces connected to the BOOST and SW
pins and always use a ground plane under the switching
regulator to minimize interplane coupling. In addition, the
ground connection for frequency setting resistor R
T
and
capacitors at V
C1
, V
C2
pins (refer to the Block Diagram)
should be tied directly to the GND pin and not shared
with the power ground path, ensuring a clean, noise-free
connection.
APPLICATIONS INFORMATION

LT3475IFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LED Lighting Drivers Dual Step-Down 1.5A LED Driver
Lifecycle:
New from this manufacturer.
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