(Note 1) (Note 4)
(Note 4) (Note 1) D4A
MODE NAME M2 M1 M0 DCE D1, D2, D3 D1 D2 D3 D5A
/DTE D4, D5 A B A B A B
Not Used
(Default V.11) 0 0 0 0 TTL X V.11 V.11 V.11 V.11 Z Z V.10
RS530A 0 0 1 0 TTL X V.11 V.11 V.10 Z Z Z V.10
RS530 0 1 0 0 TTL X V.11 V.11 V.11 V.11 Z Z V.10
X.21 0 1 1 0 TTL X V.11 V.11 V.11 V.11 Z Z V.10
V.35 1 0 0 0 TTL X V.28 Z V.28 Z Z Z V.28
RS449/V.36 1 0 1 0 TTL X V.11 V.11 V.11 V.11 Z Z V.10
V.28/RS232 1 1 0 0 TTL X V.28 Z V.28 Z Z Z V.28
No Cable 1 1 1 0 X X Z Z Z Z Z Z Z
Not Used
(Default V.11) 0 0 0 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 V.10
RS530A 0 0 1 1 TTL TTL V.11 V.11 V.10 Z V.11 V.11 V.10
RS530 0 1 0 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 V.10
X.21 0 1 1 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 V.10
V.35 1 0 0 1 TTL TTL V.28 Z V.28 Z V.28 Z V.28
RS449/V.36 1 0 1 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 V.10
V.28/RS232 1 1 0 1 TTL TTL V.28 Z V.28 Z V.28 Z V.28
No Cable 1 1 1 1 X X Z Z Z Z Z Z Z
MODE NAME M2 M1 M0 DCE
/DTE
Not Used
(Default V.11) 0 0 0 0
RS530A 0 0 1 0
RS530 0 1 0 0
X.21 0 1 1 0
V.35 1000
RS449/V.36 1 0 1 0
V.28/RS232 1 1 0 0
No Cable 1 1 1 0
Not Used
(Default V.11) 0 0 0 1
RS530A 0 0 1 1
RS530 0 1 0 1
X.21 0 1 1 1
V.35 1001
RS449/V.36 1 0 1 1
V.28/RS232 1 1 0 1
No Cable 1 1 1 1
(Note 2) (Note 3)
(Note 2) (Note 2) (Note 2) (Note 5) (Note 3) (Note 5)
R1 R2 R3 R4A R1 R2, R3
A B A B A B R5A R4, R5
V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS
V.11 V.11 V.10 30k V.11 V.11 V.10 CMOS CMOS
V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS
V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS
V.28 30k V.28 30k V.28 30k V.28 CMOS CMOS
V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS
V.28 30k V.28 30k V.28 30k V.28 CMOS CMOS
30k 30k 30k 30k 30k 30k 30k Z Z
30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS
30k 30k V.10 30k V.11 V.11 V.10 Z CMOS
30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS
30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS
30k 30k V.28 30k V.28 30k V.28 Z CMOS
30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS
30k 30k V.28 30k V.28 30k V.28 Z CMOS
30k 30k 30k 30k 30k 30k 30k Z Z
Note 1: Driver inputs are TTL level compatible.
Note 2: Unused receiver inputs are terminated with 30k to ground.
Note 3: Receiver outputs are CMOS level compatible and have a weak pull-up to V
IN
when Z.
Note 4: Driver 4 is enabled by D4ENB=0 (Pin 15).
Note 5: Receiver 4 is enabled by R4EN=1 (Pin 16).
