NLSX3013FCT1G

© Semiconductor Components Industries, LLC, 2015
June, 2017 − Rev. 4
1 Publication Order Number:
NLSX3013/D
NLSX3013
8-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX3013 is a 8−bit configurable dual−supply bidirectional
level translator without a direction control pin. The I/O V
CC
− and I/O
V
L
−ports are designed to track two different power supply rails, V
CC
and V
L
respectively. The V
CC
supply rail is configurable from 1.3 V
to 4.5 V while the V
L
supply rail is configurable from 0.9 V to (V
CC
− 0.4) V. This allows lower voltage logic signals on the V
L
side to be
translated into higher voltage logic signals on the V
CC
side, and
vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is
required.
The Output Enable (EN) input, when Low, disables both I/O ports
by putting them in 3−state. This significantly reduces the supply
currents from both V
CC
and V
L
. The EN signal is designed to track
V
L
.
Features
Wide High−Side V
CC
Operating Range: 1.3 V to 4.5 V
Wide Low−Side V
L
Operating Range: 0.9 V to (V
CC
− 0.4) V
High−Speed with 100 Mb/s Guaranteed Date Rate for V
L
> 1.8 V
Low Bit−to−Bit Skew
Overvoltage Tolerant Enable and I/O Pins
Non−preferential Powerup Sequencing
Small packaging: 2.03 mm x 2.54 mm 20 Pin Flip−Chip
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Mobile Phones, PDAs, Other Portable Devices
PC and Laptops
ESD Protection for All Pins: Human Body Model (HBM) > 6000 V
MARKING DIAGRAM
for NLSX3013FCT1G
www.onsemi.com
20 PIN FLIP−CHIP
CASE 766AK
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
V
L
V
CC
GND
EN
I/O V
L
1
I/O V
L
2
I/O V
L
3
I/O V
L
4
I/O V
CC
1
I/O V
CC
2
I/O V
CC
3
I/O V
CC
4
LOGIC DIAGRAM
I/O V
L
5
I/O V
L
6
I/O V
L
7
I/O V
L
8
I/O V
CC
5
I/O V
CC
6
I/O V
CC
7
I/O V
CC
8
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
A1
3013F
AYWW
G
for NLSX3013BFCT1G
3013B
AYWW
G
NLSX3013
www.onsemi.com
2
Figure 1. Typical Application Circuit
I/O V
L
1
I/O V
L
n
ENEN
I/On
I/O1
GND
+1.8 V System
+1.8V +3.6V
+3.6 V System
I/On
I/O1
GNDGND
NLSX3013
I/O V
CC
1
I/O V
CC
n
V
L
V
CC
Figure 2. Simplified Functional Diagram (1 I/O Line)
(EN = 1)
P
One−Shot
N
One−Shot
P
One−Shot
N
One−Shot
V
L
I/O V
L
I/O V
CC
V
CC
PIN ASSIGNMENT
Pins Description
V
CC
V
CC
Input Voltage
V
L
V
L
Input Voltage
GND Ground
EN Output Enable
I/O V
CC
n I/O Port, Referenced to V
CC
I/O V
L
n I/O Port, Referenced to V
L
FUNCTION TABLE
EN Operating Mode
L Hi−Z
H I/O Buses Connected
NLSX3013
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3
I/O V
L
2 I/O V
L
4V
L
EN I/O V
L
6
I/O V
L
1 I/O V
L
3 I/O V
L
5 I/O V
L
7 I/O V
L
8
I/O V
CC
1 I/O V
CC
3 I/O V
CC
5 I/O V
CC
7 I/O V
CC
8
I/O V
CC
2 I/O V
CC
4V
CC
GND I/O V
CC
6
Figure 3. 20 Flip−Chip (2.54 mm x 2.03 mm)
(Top View)
12345
A
B
C
D
PIN ASSIGNMENT
Pin Name Description
A1 I/O V
L
2 I/O Port 2, Referenced to V
L
A2 I/O V
L
4 I/O Port 4, Referenced to V
L
A3 V
L
V
L
Input Voltage
A4 EN Output Enable
A5 I/O V
L
6 I/O Port 6, Referenced to V
L
B1 I/O V
L
1 I/O Port 1, Referenced to V
L
B2 I/O V
L
3 I/O Port 3, Referenced to V
L
B3 I/O V
L
5 I/O Port 5, Referenced to V
L
B4 I/O V
L
7 I/O Port 7, Referenced to V
L
B5 I/O V
L
8 I/O Port 8, Referenced to V
L
C1 I/O V
CC
1 I/O Port 1, Referenced to V
CC
C2 I/O V
CC
3 I/O Port 3, Referenced to V
CC
C3 I/O V
CC
5 I/O Port 5, Referenced to V
CC
C4 I/O V
CC
7 I/O Port 7, Referenced to V
CC
C5 I/O V
CC
8 I/O Port 8, Referenced to V
CC
D1 I/O V
CC
2 I/O Port 2, Referenced to V
CC
D2 I/O V
CC
4 I/O Port 4, Referenced to V
CC
D3 V
CC
V
CC
Input Voltage
D4 GND Ground
D5 I/O V
CC
6 I/O Port 6, Referenced to V
CC

NLSX3013FCT1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 8-BIT TRANSLATOR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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