MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
MP7722 Rev. 1.5 www.MonolithicPower.com 9
1/22/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
PCB Layout
The circuit layout is critical for optimum
performance and low output distortion and
noise. Place the following components as close
to the MP7722 as possible:
Power Supply Bypass, C
BYP
C
BYP1
and C
BYP2
carry the transient current for
the switching power stage. To prevent
overstressing of the MP7722 and excessive
noise at the output, place C
BYP1
as close to pins
18 (VDD1) and 20 (PGND1) as possible and
also place C
BYP2
as close to pins 13 (VDD2) and
15 (PGND2) as possible.
Output Catch Diodes
D
SH1
, D
SL1
, D
SH2
and D
SL2
carry the current over
the dead-time while the MOSFET switches are
off. Place the diodes as close to the MP7722 as
possible.
Timing Capacitors
C
INT1
and C
INT2
are used to set the amplifier
switching frequencies and are typically on the
order of a few nF. Place C
INT1
as close to pins 2
and 3 as possible to reduce distortion and noise.
Likewise, place C
INT2
as close to pins 7 and 8
as possible.
Reference Bypass Capacitors
C
R1
and C
R2
filter the ½ V
DD
reference voltages.
Place C
R1
and C
R2
as close to the IC as
possible to improve power supply rejection and
reduce distortion and noise at the output.
When laying out the PCB, use two separate
ground planes, analog ground (AGND) and
power ground (PGND), and connect the two
grounds together at a single point to prevent
noise injection into the amplifier input to reduce
distortion.
Make sure that any traces carrying the switch
node (SW) voltages are separated far from any
input signal traces. If it is required to run the
SW trace near the input, shield the input with a
ground plane between the traces. For multiple
channel applications, make sure that each
channel is physically separated to prevent
crosstalk. Make sure that all inductors used on
a single circuit board have the same orientation.
Also, make sure that the power supply is routed
from the source to each channel individually,
not serially. This prevents channel-to-channel
coupling through the power supply input.
High V
DD
Operation
When operating at higher supply voltages,
special care must be taken to ensure that the
V
DD
level does not exceed the absolute
maximum supply rating of the IC. Power supply
pumping is of significant concern when operating
near the maximum supply voltage. Supply
pumping is an effect where the V
DD
voltage is
“pumped up” to a higher potential when charge
from the output DC blocking capacitor is
transferred to the power supply rail during switch
transitions. The simplest way to handle excess
pumping is to increase the size of the V
DD
main
bulk capacitance such that the extra charge will
be absorbed by the increased capacitance, with
minimal supply increase. One way to eliminate
supply pumping altogether is to use a different
output configuration circuit. Figure 2 shows such
an alternate configuration for connecting the
speaker load. With this configuration, one side of
the speaker load is connected directly to the
output of the LC filter, while the other side is
connected to the mid-point of a series capacitor-
divider (C26, C28). Both the LC filter point and
the mid point of the capacitor divider will be at a
DC bias level of ½ V
DD
, so the net DC across the
speaker is 0V
DC
. With the speaker connected in
this fashion, there is no series capacitor to cause
supply pumping, and supply pumping is virtually
eliminated. If the output is connected in this way,
however, additional circuitry may be required to
protect the speaker from damage in the event of
a short circuit. Because both sides of the
speaker will be typically biased at ½ V
DD
, a short-
circuit to GND on the negative side of the
speaker load will result in a large DC current
through the load. For example, if V
DD
=24V and
R
L
=4Ω, there will be 12/4=3A of DC current
through the load. This current will be sustained
by the output FET stage of the IC as it will not
trigger the internal over-current protection sense
circuitry. A simple external sense circuit will be
required for those applications which may
experience an externally applied short circuit
under normal use. An example of such a circuit
is also shown in Figure 2.