MP7722DF-LF-Z

MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
MP7722 Rev. 1.5 www.MonolithicPower.com 7
1/22/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7722 uses a minimum number of
external components to complete a stereo
Class D audio amplifier. The circuit of Figure 1
is optimized for a 24V power supply and a 1.5V
RMS maximum input signal. This circuit should
be suitable for most applications. However, if
this circuit is not suitable, use the following
sections to determine how to customize the
amplifier for a particular application.
Setting the Voltage Gain
The maximum output voltage swing is limited by
the power supply. To achieve the maximum
power out of the MP7722 amplifier, the gain
resistors should be set such that the maximum
input signal results in an output voltage swing
that reaches the supply limit (clipping). The
maximum output voltage swing at clipping is
approximately ±V
DD
/2. To achieve clipping for a
given input signal voltage, where V
IN(pk)
is the
peak input voltage, the voltage gain is:
)pk(V2
V
)MAX(A
IN
DD
V
×
=
The voltage gain setting results in the peak
output voltage approaching its maximum for the
maximum input signal. There are applications
where it is desirable to allow the amplifier to
overdrive slightly, allowing the THD to increase
at higher power levels (as the output signal
continues to go further into clipping), and so a
higher gain than A
V (max)
is required.
Setting the Switching Frequency
The idle switching frequency (the switching
frequency when no audio input is present) is a
function of several variables: the supply voltage
V
DD
, the timing capacitor C
INT
and the feedback
resistor R
FB
. For the MP7722, the idle switching
frequencies for CH1 and CH2 are independent
of each other and are a function of their own
associated components. The proper setting of
the “idle frequency” is important for obtaining
optimum performance. If the frequency is set
too high, the result will be more power loss and
high distortion, while setting the idle switching
frequency too low results in more inductor ripple,
causing more output voltage ripple with
increased the output noise.
The optimum quiescent switching frequency is
approximately 700KHz to 800KHz. Refer to
Table 1 for recommended values.
Table 1—Switching Frequency vs. V
DD
, Timing
Capacitor and Feedback Resistor (see Figure 1)
Gain
(V/V)
Gain
(dB)
R
FB
(k)
R
IN
(k)
C
INT
F
SW
V
DD
(V)
3.9 11.8 39 10 6.8nF 660KHz 12
8.2 18.3 82 10 3.3nF 660KHz 12
8.3 18.4 39 4.7 6.8nF 660KHz 12
17.4 24.8 82 4.7 3.3nF 660KHz 12
5.6 15.0 56 10 8.2nF 670KHz 24
8.2 18.3 82 10 5.6nF 720KHz 24
11.9 21.5 56 4.7 8.2nF 670KHz 24
17.4 24.8 82 4.7 5.6nF 720KHz 24
33.0 30.4 330 10 1.8nF 700KHz 24
Choosing the LC Filter
The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that
drives the speaker. Typical values for the LC
filter are a 10µH inductor and a 0.47µF
capacitor.
The characteristic frequency of the LC filter
needs to be high enough to allow high
frequency audio to the output, yet needs to be
low enough to filter out high frequency products
of the pulses from SW. The characteristic
frequency of the LC filter is:
LC2
1
f
0
π
=
The voltage ripple at the output is approximated
by the equation:
×
SW
0
DDRIPPLE
f
f
VV
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
MP7722 Rev. 1.5 www.MonolithicPower.com 8
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© 2010 MPS. All Rights Reserved.
The quality factor (Q) of the LC filter is important.
If this is too low output noise will increase, and if
this is too high then peaking may occur at high
signal frequencies reducing the passband
flatness. The circuit Q is set by the load
resistance (speaker resistance, typically 4 or
8) and is calculated as:
R
L
f2
R
L
Q
00
××π=×ω=
Where ω
0
is the characteristic frequency in
radians per second and f
0
is in Hz. Use a LC
filter with Q between 0.7 and 2.
The actual output ripple and noise is greatly
affected by the type of inductor and capacitor
used in the LC filter. Use a film capacitor and an
inductor with sufficient power handling capability
to supply the output current to the load. The
inductor should exhibit soft saturation
characteristics. If the inductor exhibits hard
saturation, it should operate well below the
saturation current. Gapped ferrite, MPP,
Powdered Iron or similar type toroidal cores are
recommended. If open or shielded bobbin ferrite
cores are used for multi-channel designs, make
sure that the start windings of each inductor line
up (all starts going toward SW pin or all starts
going toward the output) to prevent crosstalk or
other channel-to-channel interference.
Output Coupling Capacitors
The output AC coupling capacitors C
OUT1
and
C
OUT2
serve to block DC voltages and thus pass
only the amplified AC signal from the LC filter to
the load. The combination of the coupling
capacitor and the load resistance results in a
first-order high-pass filter. The values of C
OUT1
and C
OUT2
should be selected such that the
required minimum frequency is still allowed to
pass. The output corner frequency (-3dB point),
f
OUT
, can be calculated as:
OUTLOAD
OUT
CR2
1
f
××π×
=
Set the output corner frequency at or below the
minimum required frequency.
The output coupling capacitor carries the full
load current, so the capacitor should be chosen
such that its ripple current rating is greater than
the maximum load current. Low ESR aluminum
electrolytic capacitors are recommended.
Input Coupling Capacitors
The input coupling capacitors C
IN1
and C
IN2
are
used to pass only the AC signal at the input. In
a typical system application, the source input
signal is typically centered around the circuit
ground, while the MP7722 input is at half the
power supply voltage (V
DD
/2). The input
coupling capacitors transmit the AC signal from
the source to the MP7722 while blocking the
DC voltage. Choose the input coupling
capacitors such that the corner frequency (f
IN
) is
less than the passband frequency. The corner
frequency is calculated as:
ININ
IN
CR2
1
f
××π×
=
Power Source
For maximum output power, the amplifier circuit
requires a regulated external power source to
supply the power to the amplifier. A higher
power supply voltage allows more power to be
delivered to a given load resistance. However if
the power source voltage exceeds the
maximum operating voltage of 24V, the
MP7722 may sustain permanent damage. It is
very important to bypass the power supply pins
with 1µF X7R ceramic capacitors.
Power Supply Pumping
It is also very important to bypass the power
supply with a large aluminum electrolytic
capacitor. It is recommended to use a value of
at least 2200µF. This is necessary to prevent
the supply voltage from getting pumped up to a
level that exceeds the absolute maximum rating.
Supply pumping occurs in single-ended Class D
amplifiers, and is caused by rapid switch
transitions where current is pumped back up
into the supply line. The large capacitor is
necessary to absorb this current and prevent
V
DD
from rising too high.
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
MP7722 Rev. 1.5 www.MonolithicPower.com 9
1/22/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
PCB Layout
The circuit layout is critical for optimum
performance and low output distortion and
noise. Place the following components as close
to the MP7722 as possible:
Power Supply Bypass, C
BYP
C
BYP1
and C
BYP2
carry the transient current for
the switching power stage. To prevent
overstressing of the MP7722 and excessive
noise at the output, place C
BYP1
as close to pins
18 (VDD1) and 20 (PGND1) as possible and
also place C
BYP2
as close to pins 13 (VDD2) and
15 (PGND2) as possible.
Output Catch Diodes
D
SH1
, D
SL1
, D
SH2
and D
SL2
carry the current over
the dead-time while the MOSFET switches are
off. Place the diodes as close to the MP7722 as
possible.
Timing Capacitors
C
INT1
and C
INT2
are used to set the amplifier
switching frequencies and are typically on the
order of a few nF. Place C
INT1
as close to pins 2
and 3 as possible to reduce distortion and noise.
Likewise, place C
INT2
as close to pins 7 and 8
as possible.
Reference Bypass Capacitors
C
R1
and C
R2
filter the ½ V
DD
reference voltages.
Place C
R1
and C
R2
as close to the IC as
possible to improve power supply rejection and
reduce distortion and noise at the output.
When laying out the PCB, use two separate
ground planes, analog ground (AGND) and
power ground (PGND), and connect the two
grounds together at a single point to prevent
noise injection into the amplifier input to reduce
distortion.
Make sure that any traces carrying the switch
node (SW) voltages are separated far from any
input signal traces. If it is required to run the
SW trace near the input, shield the input with a
ground plane between the traces. For multiple
channel applications, make sure that each
channel is physically separated to prevent
crosstalk. Make sure that all inductors used on
a single circuit board have the same orientation.
Also, make sure that the power supply is routed
from the source to each channel individually,
not serially. This prevents channel-to-channel
coupling through the power supply input.
High V
DD
Operation
When operating at higher supply voltages,
special care must be taken to ensure that the
V
DD
level does not exceed the absolute
maximum supply rating of the IC. Power supply
pumping is of significant concern when operating
near the maximum supply voltage. Supply
pumping is an effect where the V
DD
voltage is
“pumped up” to a higher potential when charge
from the output DC blocking capacitor is
transferred to the power supply rail during switch
transitions. The simplest way to handle excess
pumping is to increase the size of the V
DD
main
bulk capacitance such that the extra charge will
be absorbed by the increased capacitance, with
minimal supply increase. One way to eliminate
supply pumping altogether is to use a different
output configuration circuit. Figure 2 shows such
an alternate configuration for connecting the
speaker load. With this configuration, one side of
the speaker load is connected directly to the
output of the LC filter, while the other side is
connected to the mid-point of a series capacitor-
divider (C26, C28). Both the LC filter point and
the mid point of the capacitor divider will be at a
DC bias level of ½ V
DD
, so the net DC across the
speaker is 0V
DC
. With the speaker connected in
this fashion, there is no series capacitor to cause
supply pumping, and supply pumping is virtually
eliminated. If the output is connected in this way,
however, additional circuitry may be required to
protect the speaker from damage in the event of
a short circuit. Because both sides of the
speaker will be typically biased at ½ V
DD
, a short-
circuit to GND on the negative side of the
speaker load will result in a large DC current
through the load. For example, if V
DD
=24V and
R
L
=4, there will be 12/4=3A of DC current
through the load. This current will be sustained
by the output FET stage of the IC as it will not
trigger the internal over-current protection sense
circuitry. A simple external sense circuit will be
required for those applications which may
experience an externally applied short circuit
under normal use. An example of such a circuit
is also shown in Figure 2.

MP7722DF-LF-Z

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Audio Amplifiers 2x20W Class-D Single Ended Stereo Amp
Lifecycle:
New from this manufacturer.
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