9397 750 13276 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 May 2004 10 of 20
Philips Semiconductors
74LVC821A
10-bit D-type flip-flop with 5 V tolerant inputs/outputs
[1] All typical values are measured T
amb
=25°C.
[2] These typical values are measured at V
CC
= 3.3 V.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+Σ (C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ (C
L
× V
CC
2
× f
o
) = sum of the outputs.
[5] The condition is V
I
= GND to V
CC
.
T
amb
= −40 °C to +125 °C
t
PHL
, t
PLH
propagation delay CP to Qn see Figure 7
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 1.5 - 11.0 ns
V
CC
= 3.0 V to 3.6 V 1.5 - 9.5 ns
t
PZH
, t
PZL
3-state output enable time OE to Qn see Figure 9
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 1.5 - 11.0 ns
V
CC
= 3.0 V to 3.6 V 1.3 - 9.5 ns
t
PHZ
, t
PLZ
3-state output disable time OE to Qn see Figure 9
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 1.5 - 8.5 ns
V
CC
= 3.0 V to 3.6 V 1.5 - 8.0 ns
t
W
clock pulse width HIGH or LOW see Figure 7
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 3.3 - - ns
V
CC
= 3.0 V to 3.6 V 3.3 - - ns
t
su
set-up time Dn to CP see Figure 8
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 0.9 - - ns
V
CC
= 3.0 V to 3.6 V 1.9 - - ns
t
h
hold time Dn to CP see Figure 8
V
CC
= 1.2 V - - - ns
V
CC
= 2.7 V 1.5 - - ns
V
CC
= 3.0 V to 3.6 V 1.5 - - ns
f
max
maximum clock frequency see Figure 7
V
CC
= 1.2 V - - - MHz
V
CC
= 2.7 V 150 - - MHz
V
CC
= 3.0 V to 3.6 V 150 - - MHz
t
sk(0)
skew V
CC
= 3.0 V to 3.6 V
[3]
- - 1.0 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
=t
f
≤
2.5 ns; C
L
= 50 pF; R
L
= 500
Ω
; for test circuit see Figure 10
Symbol Parameter Conditions Min Typ Max Unit
