Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
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use http://www.nexperia.com
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
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Kind regards,
Team Nexperia
1. General description
The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are
pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
with JEDEC standard No. 7-A.
The 74VHC02-Q100; 74VHCT02-Q100 provide a quad 2-input NOR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than V
CC
Input levels:
The 74VHC02-Q100 operates with CMOS input level
The 74VHCT02-Q100 operates with TTL input level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
Rev. 1 — 15 November 2013 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74VHC02D-Q100 40 C to +125 C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74VHCT02D-Q100
74VHC02PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74VHCT02PW-Q100
74VHC02BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1
74VHCT02BQ-Q100
74VHC_VHCT02_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 15 November 2013 2 of 15
NXP Semiconductors 74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate)
mna216
1A
1B
1Y
3
2
1
2A
2B
2Y
6
5
4
3A
3B
3Y
9
8
10
4A
4B
4Y
12
11
13
001aah084
2
1
3
5
4
1
6
1
8
10
1
9
11
13
1
12
mna215
A
B
Y
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14
9+&4
9+&74
< 9
&&
$ <
% %
< $
$ <
% %
*1' $
DDD






74VHCT02BQ-Q100X

Mfr. #:
Manufacturer:
Nexperia
Description:
Logic Gates Quad 2-input NOR gate
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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