MAX5920
If the voltage between V
EE
and SENSE reaches the cur-
rent-limit trip voltage (V
CL
), the MAX5920_ pulls down
the GATE pin and regulates the current through the
external MOSFET so V
SENSE
- V
EE
< V
CL
. If the current
drawn by the load drops below V
CL
/ R
SENSE
limit, the
GATE pin voltage rises again. However, if the load cur-
rent is at the regulation limit of V
CL
/ R
SENSE
for a period
of t
PHLCL
, the electronic circuit breaker trips, causing
the MAX5920A/MAX5920B to turn off the external MOS-
FET.
After an overcurrent fault condition, the circuit breaker
is reset by pulling the UV pin low and then pulling UV
high or by cycling power to the MAX5920A/MAX5920B.
Unless power is cycled to the MAX5920A/MAX5920B,
the device waits until t
OFF
has elapsed before turning
on the gate of the external FET.
Overcurrent Fault Integrator
The MAX5920_ feature an overcurrent fault integrator.
When an overcurrent condition exists, an internal digital
counter increments its count. When the counter reaches
500µs (the maximum current-limit duration) for the
MAX5920_, an overcurrent fault is generated. If the
overcurrent fault does not last 500µs, then the counter
begins decrementing at a rate 128 (maximum current-
limit duty cycle) times slower than the counter was
incrementing. Repeated overcurrent conditions will gen-
erate a fault if duty cycle of the overcurrent condition is
greater than 1/128.
Load-Current Regulation
The MAX5920A/MAX5920B accomplish load-current
regulation by pulling current from the GATE pin when-
ever V
SENSE
- V
EE
> V
CL
(see Typical Operating
Characteristics). This decreases the gate-to-source
voltage of the external MOSFET, thereby reducing the
load current. When V
SENSE
- V
EE
< V
CL
, the
MAX5920A/MAX5920B pull the GATE pin high by a
45µA (I
PU
) current.
Driving into a Shorted Load
In the event of a permanent short-circuit condition, the
MAX5920A/MAX5920B limit the current drawn by the
load to V
CL
/ R
SENSE
for a period of t
PHLCL
, after which
the circuit breaker trips. Once the circuit breaker trips,
the GATE of the external FET is pulled low by 50mA
(I
PD
) turning off power to the load.
Immunity to Input Voltage Steps
The MAX5920A/MAX5920B guard against input voltage
steps on the input supply. A rapid increase in the input
supply voltage (V
DD
- V
EE
increasing) causes a current
step equal to I = C
L
x ∆V
IN
/ ∆T, proportional to the input
voltage slew rate (∆V
IN
/ ∆T). If the load current exceeds
V
CL
/ R
SENSE
during an input voltage step, the
MAX5920A/MAX5920B current limit activates, pulling
down the gate voltage and limiting the load current to
V
CL
/ R
SENSE
. The DRAIN voltage (V
DRAIN
) then slews at
a slower rate than the input voltage. As the drain voltage
starts to slew down, the drain-to-gate feedback capacitor
C2 pushes back on the gate, reducing the gate-to-
source voltage (V
GS
) and the current through the exter-
nal MOSFET. Once the input supply reaches its final
value, the DRAIN slew rate (and therefore the inrush cur-
rent) is limited by the capacitor C2 just as it is limited in
the startup condition. To ensure correct operation,
R
SENSE
must be chosen to provide a current limit larger
than the sum of the load current and the dynamic current
into the load capacitance in the slewing mode.
If the load current plus the capacitive charging current is
below the current limit, the circuit breaker does not trip.
-48V Hot-Swap Controller
with External R
SENSE
10 ______________________________________________________________________________________
