© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 2
1 Publication Order Number:
EMD4DXV6/D
EMD4DXV6
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMD4DXV6T1 series,
two complementary BRT devices are housed in the SOT−563 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These are Pb−Free Devices
MAXIMUM RATINGS (T
A
= 25°C unless otherwise noted, common for Q
1
and Q
2
, − minus sign for Q
1
(PNP) omitted)
Rating
Symbol Value Unit
Collector-Base Voltage V
CBO
50 Vdc
Collector-Emitter Voltage V
CEO
50 Vdc
Collector Current I
C
100 mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol Max Unit
Total Device Dissipation
T
A
= 25°C (Note 1)
Derate above 25°C (Note 1)
P
D
357
2.9
mW
mW/°C
Thermal Resistance,
Junction-to-Ambient (Note 1)
R
q
JA
350 °C/W
Total Device Dissipation
T
A
= 25°C (Note 1)
Derate above 25°C
P
D
500
4.0
mW
mW/°C
Thermal Resistance,
Junction-to-Ambient (Note 1)
R
q
JA
250 °C/W
Junction and Storage Temperature T
J
, T
stg
−55 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−4 board with minimum mounting pad.
Q
1
R
1
R
2
R
2
R
1
Q
2
(1)(2)(3)
(4) (5) (6)
http://onsemi.com
SOT−563
CASE 463A
STYLE 1
U7 = Specific Device Code
M = Date Code
G = Pb−Free Package
MARKING DIAGRAM
Device Package Shipping
†
ORDERING INFORMATION
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
EMD4DXV6T5G SOT−563
(Pb−Free)
8000 / Tape &
Reel
EMD4DXV6T1G SOT−563
(Pb−Free)
4000 / Tape &
Reel
(Note: Microdot may be in either location)
U7 M G
G
1
1
6
NSVEMD4DXV6T5G SOT−563
(Pb−Free)
8000 / Tape &
Reel