NLV14040BDR2G Datasheet NLV14040BDR2G, MC14040BDG, MC14040BDR2G | P4-P6

MC14040B

http://onsemi.com

4

SWITCHING CHARACTERISTICS (Note 5) (C

L

= 50 pF, T

A

= 25_C)

Characteristic

Symbol

V

DD

Vdc

Min

Typ

(Note 6)

Max Unit

Output Rise and Fall Time

T

TLH

, T

THL

= (1.5 ns/pF) C

L

+ 25 ns

T

TLH

, T

THL

= (0.75 ns/pF) C

L

+ 12.5 ns

T

TLH

, T

THL

= (0.55 ns/pF) C

L

+ 9.5 ns

t

TLH

,

t

THL

5.0

10

15

−

100

50

40

200

100

80

ns

Propagation Delay Time

Clock to Q1

t

PHL

, t

PLH

= (1.7 ns/pF) C

L

+ 315 ns

t

PHL

, t

PLH

= (0.66 ns/pF) C

L

+ 137 ns

t

PHL

, t

PLH

= (0.5 ns/pF) C

L

+ 95 ns

Clock to Q12

t

PHL

, t

PLH

= (1.7 ns/pF) C

L

+ 2415 ns

t

PHL

, t

PLH

= (0.66 ns/pF) C

L

+ 867 ns

t

PHL

, t

PLH

= (0.5 ns/pF) C

L

+ 475 ns

t

PLH

,

t

PHL

5.0

10

15

−

260

115

80

520

230

160

ns

5.0

10

15

−

1625

720

500

3250

1440

1000

ns

Propagation Delay Time

Reset to Q

n

t

PHL

= (1.7 ns/pF) C

L

+ 485 ns

t

PHL

= (0.86 ns/pF) C

L

+ 182 ns

t

PHL

= (0.5 ns/pF) C

L

+ 145 ns

t

PHL

5.0

10

15

−

370

155

115

740

310

230

ns

Clock Pulse Width t

WH

5.0

10

15

385

150

115

140

55

38

−

ns

Clock Pulse Frequency f

cl

5.0

10

15

−

2.1

7.0

10.0

1.5

3.5

4.5

MHz

Clock Rise and Fall Time t

TLH

, t

THL

5.0

10

15

No Limit

ns

Reset Pulse Width t

WH

5.0

10

15

960

360

270

320

120

80

−

ns

Reset Removal Time t

rem

5.0

10

15

130

50

30

65

25

15

−

ns

5. The formulas given are for the typical characteristics only at 25_C.

6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 1. Power Dissipation Test Circuit

and Waveform

Figure 2. Switching Time Test Circuit

and Waveforms

PULSE

GENERATOR

PULSE

GENERATOR

500 mF

0.01 mF

CERAMIC

V

DD

V

SS

C

L

C

L

C

L

I

D

Q1

Q2

Q

n

C

R

20 ns 20 ns

V

DD

V

SS

90%

50%

10%

CLOCK

50% DUTY CYCLE

V

DD

V

SS

C

L

C

L

C

L

Q1

Q2

Q

n

C

R

20 ns 20 ns

CLOCK

90%

50%

10%

t

WH

t

PHL

t

PLH

Q

90%

50%

10%

t

TLH

t

THL

MC14040B

http://onsemi.com

5

Figure 3. Timing Diagram

CLOCK

RESET

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

Q11

Q12

1 2 4 8 16 32 64 128 256 512 1024 2048 4096

APPLICATIONS INFORMATION

TIME−BASE GENERATOR

A 60 Hz sinewave obtained through a 1.0 Megohm

resistor connected directly to a standard 120 Vac power line

is applied to the clock input of the MC14040B. By selecting

outputs Q5, Q10, Q11, and Q12 division by 3600 is

accomplished. The MC14012B decodes the counter

outputs, produces a single output pulse, and resets the binary

counter. The resulting output frequency is 1.0 pulse/minute.

MC14040B

Figure 4. Time−Base Generator

Clock Q5

Q10

Q11

Q12

V

CC

13

12

10

9

1

2

4

5

8

1/2

14012B

6

1/6 of HC14A

≥20pF

1.0M

1.0 Pulse/Minute

Output

V

CC

120Vac

60Hz

NOTE: Ground MUST be isolated

by a transformer or

opto−isolator for safety

reasons.

1/2

14012B

MC14040B

http://onsemi.com

6

PACKAGE DIMENSIONS

SOIC−16

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751B−05

ISSUE K

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR PROTRUSION

SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D

DIMENSION AT MAXIMUM MATERIAL CONDITION.

18

16 9

SEATING

PLANE

F

J

M

R

X 45

_

G

8 PLP

−B−

−A−

M

0.25 (0.010) B

S

−T−

D

K

C

16 PL

S

B

M

0.25 (0.010) A

S

T

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 9.80 10.00 0.386 0.393

B 3.80 4.00 0.150 0.157

C 1.35 1.75 0.054 0.068

D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009

K 0.10 0.25 0.004 0.009

M 0 7 0 7

P 5.80 6.20 0.229 0.244

R 0.25 0.50 0.010 0.019

____

6.40

16X

0.58

16X

1.12

1.27

DIMENSIONS: MILLIMETERS

1

PITCH

16

89

8X

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

NLV14040BDR2G

NLV14040BDR2G

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