2.5V DIFFERENTIAL 1:5 CLOCK BUFFER
TERABUFFER™
5T915 DATA SHEET
4 REVISION A 11/3/15
INPUT/OUTPUT SELECTION
(1)
Input Output
2.5V LVTTL SE 2.5V LVTTL
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
2.5V LVTTL SE 1.8V LVTTL
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
Input Output
2.5V LVTTL SE eHSTL
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
2.5V LVTTL SE HSTL
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
NOTE:
1. The INPUT/OUTPUT SELECTION Table describes the total possible combinations of input and output interfaces. Single-Ended (SE) inputs in a single-ended mode require the A/VREF
pin to be connected to GND. Differential Single-Ended (DSE) is for single-ended operation in differential mode, requiring a VREF. Differential (DIF) inputs are used only in differential
mode.
NOTE:
1. These inputs are normally wired to V
DD, GND, or left oating. Internal termination resistors bias unconnected inputs to VDD/2.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol Parameter Test Conditions Min. Max Unit
V
IHH Input HIGH Voltage Level
(1)
3-Level Inputs Only VDD – 0.4 V
V
IMM Input MID Voltage Level
(1)
3-Level Inputs Only VDD/2 – 0.2 VDD/2 + 0.2 V
V
ILL Input LOW Voltage Level
(1)
3-Level Inputs Only 0.4 V
V
IN = VDD HIGH Level 200
I
3 3-Level Input DC Current (RxS, TxS) VIN = VDD/2 MID Level –50 +50 μA
V
IN = GND LOW Level –200
REVISION A 11/3/15
5T915 DATA SHEET
5 2.5V DIFFERENTIAL 1:5 CLOCK BUFFER
TERABUFFER™
POWER SUPPLY CHARACTERISTICS FOR HSTL OUTPUTS
(1)
Symbol Parameter Test Conditions
(2)
Typ. Max Unit
I
DDQ Quiescent VDD Power Supply Current VDDQ = Max., Reference Clock = LOW
(3)
20 30 mA
Outputs enabled, All outputs unloaded
I
DDQQ Quiescent VDDQ Power Supply Current VDDQ = Max., Reference Clock = LOW
(3)
0.1 0.3 mA
Outputs enabled, All outputs unloaded
I
DDD Dynamic VDD Power Supply VDD = Max., VDDQ = Max., CL = 0pF 20 30 μA/MHz
Current per Output
I
DDDQ Dynamic VDDQ Power Supply VDD = Max., VDDQ = Max., CL = 0pF 30 50 μA/MHz
Current per Output
I
TOT Total Power VDD Supply Current VDDQ = 1.5V, FREFERENCE CLOCK = 100MHz, CL = 15pF 20 40 mA
V
DDQ = 1.5V, FREFERENCE CLOCK = 250MHz, CL = 15pF 35 50
I
TOTQ Total Power VDDQ Supply Current VDDQ = 1.5V, FREFERENCE CLOCK = 100MHz, CL = 15pF 35 70 mA
V
DDQ = 1.5V, FREFERENCE CLOCK = 250MHz, CL = 15pF 60 120
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR HSTL
(1)
Symbol Parameter Test Conditions Min. Typ.
(7)
Max Unit
Input Characteristics
I
IH Input HIGH Current
(9)
VDD = 2.6V VI = VDDQ/GND — ±5 μA
I
IL Input LOW Current
(9)
VDD = 2.6V VI = GND/VDDQ±5
V
IK Clamp Diode Voltage VDD = 2.4V, IIN = -18mA - 0.7 - 1.2 V
V
IN DC Input Voltage - 0.3 +3.6 V
V
DIF DC Differential Voltage
(2,8)
0.2 V
V
CM DC Common Mode Input Voltage
(3,8)
680 750 900 mV
V
IH DC Input HIGH
(4,5,8)
VREF + 100 mV
V
IL DC Input LOW
(4,6,8)
VREF - 100 mV
V
REF Single-Ended Reference Voltage
(4,8)
750 mV
Output Characteristics
V
OH Output HIGH Voltage IOH = -8mA VDDQ - 0.4 V
I
OH = -100μA VDDQ - 0.1 V
V
OL Output LOW Voltage IOL = 8mA 0.4 V
I
OL = 100μA0.1 V
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF speci es the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode only.
The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching to a new
state.
3. VCM speci es the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in differential mode, A/VREF is tied to the DC voltage VREF.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at VDD = 2.5V, VDDQ = 1.5V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be referenced.
9. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.
2.5V DIFFERENTIAL 1:5 CLOCK BUFFER
TERABUFFER™
5T915 DATA SHEET
6 REVISION A 11/3/15
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
Symbol Parameter Value Units
V
DIF Input Signal Swing
(1)
1 V
V
X Differential Input Signal Crossing Point
(2)
750 mV
V
THI Input Timing Measurement Reference Level
(3)
Crossing Point V
t
R, tF Input Signal Edge Rate
(4)
1 V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is speci ed to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VDIF (AC)
speci cation under actual use conditions.
2. A 750mV crossing point level is speci ed to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VX speci cation
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR eHSTL
(1)
Symbol Parameter Test Conditions Min. Typ.
(7)
Max Unit
Input Characteristics
I
IH Input HIGH Current
(9)
VDD = 2.6V VI = VDDQ/GND — ±5 μA
I
IL Input LOW Current
(9)
VDD = 2.6V VI = GND/VDDQ±5
V
IK Clamp Diode Voltage VDD = 2.4V, IIN = -18mA - 0.7 - 1.2 V
V
IN DC Input Voltage - 0.3 +3.6 V
V
DIF DC Differential Voltage
(2,8)
0.2 V
V
CM DC Common Mode Input Voltage
(3,8)
800 900 1000 mV
V
IH DC Input HIGH
(4,5,8)
VREF + 100 mV
V
IL DC Input LOW
(4,6,8)
VREF - 100 mV
V
REF Single-Ended Reference Voltage
(4,8)
900 mV
Output Characteristics
V
OH Output HIGH Voltage IOH = -8mA VDDQ - 0.4 V
I
OH = -100μA VDDQ - 0.1 V
V
OL Output LOW Voltage IOL = 8mA 0.4 V
I
OL = 100μA 0.1 V
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF speci es the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode only.
The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching to a new
state.
3. VCM speci es the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in a differential mode, A/V
REF is tied to the DC voltage VREF.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at V
DD = 2.5V, VDDQ = 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be referenced.
9. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.

5T915PAGI

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Description:
Clock Drivers & Distribution 2.5V DDR 1:5 Clock Drive
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