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MAX7325
I
2
C Port Expander with 8 Push-Pull
and 8 Open-Drain I/Os
EVALUATION KIT AVAILABLE
General Description
The MAX7325 2-wire serial-interfaced peripheral features
16 I/O ports. Ports are divided into eight push-pull out-
puts and eight I/Os with selectable internal pullups and
transition detection. Eight ports are push-pull outputs
and eight I/Os may be used as a logic input or an open-
drain output. Ports are overvoltage protected to +6V.
All I/O ports configured as inputs are continuously mon-
itored for state changes (transition detection). State
changes are indicated by the INT output. The interrupt
is latched, allowing detection of transient changes.
When the MAX7325 is subsequently accessed through
the serial interface, any pending interrupt is cleared.
The open-drain outputs are rated to sink 20mA, and are
capable of driving LEDs. The RST input clears the serial
interface, terminating any I
2
C communication to or from
the MAX7325.
The MAX7325 uses two address inputs with four-level
logic to allow 16 I
2
C slave addresses. The slave
address also determines the power-up logic state for
the I/O ports, and enables or disables internal 40k
pullups in groups of four ports.
The MAX7325 is one device in a family of pin-compatible
port expanders with a choice of input ports, open-drain
I/O ports, and push-pull output ports (see Table 1).
The MAX7325 is available in 24-pin QSOP and TQFN
packages and is specified over the -40°C to +125°C
automotive temperature range.
Applications
Cell Phones Notebooks
SAN/NAS Satellite Radio
Servers Automotive
Features
o 400kHz I
2
C Serial Interface
o +1.71V to +5.5V Operation
o 8 Push-Pull Outputs
o 8 Open-Drain I/O Ports, Rated to 20mA Sink
Current
o I/O Ports are Overvoltage Protected to +6V
o Selectable I/O Port Power-Up Default Logic States
o Transient Changes are Latched, Allowing
Detection Between Read Operations
o INT Output Alerts Change on Inputs
o AD0 and AD2 Inputs Select from 16 Slave
Addresses
o Low 0.6µA (typ) Standby Current
o -40°C to +125°C Temperature Range
19-3807; Rev 1; 9/12
Ordering Information
PART TEMP RANGE PIN-PACKAGE
MAX7325AEG+ -40°C to +125°C 24 QSOP
MAX7325AEG/V+ -40°C to +125°C 24 QSOP
MAX7325ATG+ -40°C to +125°C
24 TQFN-EP*
(4mm x 4mm)
Typical Application Circuit and Functional Diagram appear
at end of data sheet.
Selector Guide
PART INPUTS
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-PULL
OUTPUTS
MAX7324 8 Yes 8
MAX7325 Up to 8 Up to 8 8
MAX7326 4 Yes 12
MAX7327 Up to 4 Up to 4 12
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed paddle.
/V Denotes an automotive qualified part.
TQFN (4mm x 4mm)
+
TOP VIEW
MAX7325
19
20
21
22
12 3456
18 17 16 15 14 13
23
24
12
11
10
9
8
7
SCL
V+
SDA
INT
AD2
P0
P1
P2
P3
P4
P5
AD0
O15
O13
O12
O11
RST
O10
O8
O9
GND
P6
P7
O14
EXPOSED PADDLE
Pin Configurations
Pin Configurations continued at end of data sheet.
MAX7325
I
2
C Port Expander with 8 Push-Pull
and 8 Open-Drain I/Os
2
Maxim Integrated
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
Supply Voltage V+....................................................-0.3V to +6V
SCL, SDA, AD0, AD2, RST, INT, P0–P7 ...................-0.3V to +6V
O8–O15 ........................................................-0.3V to (V+ + 0.3V)
O8–O15 Output Current ...................................................±25mA
P0–P7 Sink Current ......................................................................25mA
SDA Sink Current ........................................................................ 10mA
INT Sink Current..................................................................10mA
Total V+ Current..................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
24-Pin QSOP (derate 9.5mW/°C over +70°C)...........761.9mW
24-Pin TQFN (derate 20.8mW/°C over+70°C) ........1666.7mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
DC ELECTRICAL CHARACTERISTICS
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage V+ T
A
= -40°C to +125°C 1.71 5.50 V
Power-On-Reset Voltage V
POR
V+ falling 1.6 V
Standby Current
(Interface Idle)
I
STB
SCL and SDA and other
digital inputs at V+
T
A
= -40°C to
+125°C
0.6 1.9 µA
Supply Current
(Interface Running)
I+
f
SCL
= 400kHz; other
digital inputs at V+
T
A
= -40°C to
+125°C
23 55 µA
V+ < 1.8V 0.8 x V+
Input High-Voltage
SDA, SCL, AD0, AD2, RST, P0–P7
V
IH
V+ 1.8V 0.7 x V+
V
V+ < 1.8V 0.2 x V+
Input Low-Voltage
SDA, SCL, AD0, AD2, RST, P0–P7
V
IL
V+ 1.8V 0.3 x V+
V
Input Leakage Current
SDA, SCL, AD0, AD2, RST, P0–P7
I
IH
, I
IL
SDA, SCL, AD0, AD2, RST, P0–P7 at V+ or
GND, internal pullup disabled
-0.2 +0.2 µA
Input Capacitance
SDA, SCL, AD0, AD2, RST, P0–P7
10 pF
V+ = +1.71V, I
SINK
= 5mA (QSOP) 90 180
V+ = +1.71V, I
SINK
= 5mA (TQFN) 90 230
V+ = +2.5V, I
SINK
= 10mA (QSOP) 110 210
V+ = +2.5V, I
SINK
= 10mA (TQFN) 110 260
V+ = +3.3V, I
SINK
= 15mA (QSOP) 130 230
V+ = +3.3V, I
SINK
= 15mA (TQFN) 130 280
V+ = +5V, I
SINK
= 20mA (QSOP) 140 250
Output Low Voltage
O8–O15, P0–P7
V
OL
V+ = +5V, I
SINK
= 20mA (TQFN) 140 300
mV
V+ = +1.71V, I
SOURCE
= 2mA V + - 250 V + - 30
V+ = +2.5V, I
SOURCE
= 5mA V + - 360 V + - 70
V+ = +3.3V, I
SOURCE
= 5mA V + - 260 V + - 100
Output High Voltage
O8–O15
V
OH
V+ = +5V, I
SOURCE
= 10mA V + - 360 V + - 120
mV
Output Low-Voltage SDA V
OLSDA
I
SINK
= 6mA 250 mV
Output Low-Voltage INT V
OLINT
I
SINK
= 5mA 130 250 mV
Port Input Pullup Resistor R
PU
25 40 55 k
MAX7325
I
2
C Port Expander with 8 Push-Pull
and 8 Open-Drain I/Os
3
Maxim Integrated
PORT AND INTERRUPT INT TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Port Output Data Valid t
PPV
C
L
100pF 4 µs
Port Input Setup Time t
PSU
C
L
100pF 0 µs
Port Input Hold Time t
PH
C
L
100pF 4 µs
INT Input Data Valid Time t
IV
C
L
100pF 4 µs
INT Reset Delay Time from STOP t
IP
C
L
100pF 4 µs
INT Reset Delay Time from
Acknowledge
t
IR
C
L
100pF 4 µs
TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Serial-Clock Frequency f
SCL
400 kHz
Bus Free Time Between a STOP
and a START Condition
t
BUF
1.3 µs
Hold Time (Repeated) START
Condition
t
HD
,
STA
0.6 µs
Repeated START Condition
Setup Time
t
SU
,
STA
0.6 µs
STOP Condition Setup Time t
SU
,
STO
0.6 µs
Data Hold Time t
HD
,
DAT
(Note 2) 0.9 µs
Data Setup Time t
SU
,
DAT
100 ns
SCL Clock Low Period t
LOW
1.3 µs
SCL Clock High Period t
HIGH
0.7 µs
Rise Time of Both SDA and SCL
Signals, Receiving
t
R
(Notes 3, 4)
20 +
0.1C
b
300 ns
Fall Time of Both SDA and SCL
Signals, Receiving
t
F
(Notes 3, 4)
20 +
0.1C
b
300 ns
Fall Time of SDA Transmitting t
F,TX
(Notes 3, 4)
20 +
0.1C
b
250 ns
Pulse Width of Spike Suppressed t
SP
(Note 5) 50 ns
Capacitive Load for Each Bus
Line
C
b
(Note 3) 400 pF
RST Pulse Width t
W
500 ns
RST Rising to START Condition
Setup Time
t
RST
s
Note 1: All parameters are tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: C
b
= total capacitance of one bus line in pF. I
SINK
6mA. t
R
and t
F
measured between 0.3 x V+ and 0.7 x V+.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

MAX7325AEG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders I2C Port Expander w/8 P-P Out & 8 I/O
Lifecycle:
New from this manufacturer.
Delivery:
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