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T2N7002BK,LM

P1-P3P4-P6P7-P8
T2N7002BK
1
MOSFETs Silicon N-Channel MOS
T2N7002BK
T2N7002BK
T2N7002BK
T2N7002BK
Start of commercial production
2015-05
1.
1.
1.
1. Applications
Applications
Applications
Applications
• High-Speed Switching
2.
2.
2.
2. Features
Features
Features
Features
(1) ESD(HBM) level 2 kV
(2) Low drain-source on-resistance
: R
DS(ON)
= 1.05 Ω (typ.) (@V
GS
= 10 V)
R
DS(ON)
= 1.15 Ω (typ.) (@V
GS
= 5 V)
R
DS(ON)
= 1.2 Ω (typ.) (@V
GS
= 4.5 V)
3.
3.
3.
3. Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
SOT23
1: Gate
2: Source
3: Drain
2015-08-25
Rev.1.0
©2015 Toshiba Corporation
T2N7002BK
2
4.
4.
4.
4. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
Absolute Maximum Ratings (Note) (Unless otherwise specified, T
Absolute Maximum Ratings (Note) (Unless otherwise specified, T
Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
Power dissipation
Power dissipation
Channel temperature
Storage temperature
(Note 1)
(Note 1), (Note 2)
(Note 3)
(Note 4)
Symbol
V
DSS
V
GSS
I
D
I
DP
P
D
T
ch
T
stg
Rating
60
±20
400
1200
320
1000
150
-55 to 150
Unit
V
mA
mW
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Ensure that the channel temperature does not exceed 150 .
Note 2: Repetitive rating; pulse width limited by maximum channel temperature.
pulse width ≤ 10 µs, Duty ≤ 1 %
Note 3: Device mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR-4 glass epoxy board (Cu pad: 0.42 mm
2
× 3)
Note 4: Device mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR-4 glass epoxy board (Cu pad: 645 mm
2
)
Note: This transistor is sensitive to electrostatic discharge and should be handled with care.
Note: The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables,
operators, soldering irons and other objects should be protected against anti-static discharge.
Note: The channel-to-ambient thermal resistance, R
th(ch-a)
, and the drain power dissipation, P
D
, vary according to
the board material, board area, board thickness and pad area. When using this device, be sure to take heat
dissipation fully into account.
2015-08-25
Rev.1.0
©2015 Toshiba Corporation
T2N7002BK
3
5.
5.
5.
5. Electrical Characteristics
Electrical Characteristics
Electrical Characteristics
Electrical Characteristics
5.1.
5.1.
5.1.
5.1. Static Characteristics (Unless otherwise specified, T
Static Characteristics (Unless otherwise specified, T
Static Characteristics (Unless otherwise specified, T
Static Characteristics (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
Forward transfer admittance
(Note 1)
(Note 1)
Symbol
I
GSS
I
DSS
V
(BR)DSS
V
th
R
DS(ON)
|Y
fs
|
Test Condition
V
GS
= ±16 V, V
DS
= 0 V
V
DS
= 60 V, V
GS
= 0 V
I
D
= 250 µA, V
GS
= 0 V
I
D
= 250 µA, V
DS
= V
GS
I
D
= 100 mA, V
GS
= 10 V
I
D
= 100 mA, V
GS
= 5.0 V
I
D
= 100 mA, V
GS
= 4.5 V
V
DS
= 10 V, I
D
= 200 mA
Min
60
1.1
Typ.
1.05
1.15
1.2
1.0
Max
±10
1
2.1
1.5
1.65
1.75
Unit
µA
V
Ω
S
Note 1: Pulse measurement.
5.2.
5.2.
5.2.
5.2. Dynamic Characteristics (Unless otherwise specified, T
Dynamic Characteristics (Unless otherwise specified, T
Dynamic Characteristics (Unless otherwise specified, T
Dynamic Characteristics (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time (rise time)
Switching time (turn-on delay time)
Switching time (fall time)
Switching time (turn-off delay time)
Symbol
C
iss
C
rss
C
oss
t
r
t
d(on)
t
f
t
d(off)
Test Condition
V
DS
= 10 V, V
GS
= 0 V,
f = 1 MHz
V
DD
= 30 V, I
D
= 200 mA
V
GS
= 0 to 10 V, R
G
= 50 Ω
Duty ≤ 1%, V
IN
: t
r
, t
f
< 5 ns,
Common source, See Chapter 5.3.
Min
Typ.
26
1.3
5.5
3.6
5.5
17
38
Max
40
11
90
Unit
pF
ns
5.3.
5.3.
5.3.
5.3. Switching Time Test Circuit
Switching Time Test Circuit
Switching Time Test Circuit
Switching Time Test Circuit
Fig.
Fig.
Fig.
Fig. 5.3.1
5.3.1
5.3.1
5.3.1 Switching Time Test Circuit
Switching Time Test Circuit
Switching Time Test Circuit
Switching Time Test Circuit Fig.
Fig.
Fig.
Fig. 5.3.2
5.3.2
5.3.2
5.3.2 Input Waveform/Output Waveform
Input Waveform/Output Waveform
Input Waveform/Output Waveform
Input Waveform/Output Waveform
5.4.
5.4.
5.4.
5.4. Gate Charge Characteristics (Unless otherwise specified, T
Gate Charge Characteristics (Unless otherwise specified, T
Gate Charge Characteristics (Unless otherwise specified, T
Gate Charge Characteristics (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Total gate charge (gate-source plus gate-drain)
Gate-source charge
Gate-drain charge
Symbol
Q
g
Q
gs
Q
gd
Test Condition
V
DS
= 30 V, V
GS
= 4.5 V,
I
D
= 200 mA
Min
Typ.
0.39
0.2
0.11
Max
0.6
Unit
nC
2015-08-25
Rev.1.0
©2015 Toshiba Corporation
P1-P3P4-P6P7-P8

T2N7002BK,LM

Mfr. #:
Buy T2N7002BK,LM
Manufacturer:
Toshiba
Description:
MOSFET Small Signal Mosfet
Lifecycle:
New from this manufacturer.
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