Philips Semiconductors Product data sheet
74F543Octal registered transceiver, non-inverting (3-State)
2
2004 Jul 22
FEATURES
• Combines74F245 and 74F373 type functions in one chip
• 8-bit octal transceiver with D-type latch
• Back-to-back registers for storage
• Separate controls for data flow in each direction
• A outputs sink 20 mA and source 3 mA
• B outputs sink 64 mA and source 15 mA
• 3-State outputs for bus-oriented applications
• Available in SSOP Type II package
DESCRIPTION
The 74F543 Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB
, LEBA) and Output Enable
(OEAB
, OEBA) inputs are provided for each register to permit
independent control of inputting and outputting in either direction of
data flow. The A outputs are guaranteed to sink 24 mA, while the
B outputs are rated for 64 mA.
FUNCTIONAL DESCRIPTION
The 74F543 contains two sets of eight D-type latches, with separate
input and controls for each set. For data flow from A to B, for
example, the A-to-B Enable (EAB
) input must be LOW in order to
enter data from A0 - A7 or take data from B0 - B7, as indicated in
the Function Table. With EAB
LOW, a LOW signal on the A-to-B
Latch Enable (LEAB
) input makes the A-to-B latches transparent; a
subsequent LOW-to-HIGH transition for the LEAB
signal puts the
A latches in the storage mode and their outputs no longer change
with the A inputs. With EAB
and OEAB both LOW, the 3-State
B output buffers are active and display the data present at the
outputs of the A latches. Control of data flow from B to A is similar,
but using the EBA
, LEBA, and OEBA inputs.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F543 6.0 ns 80 mA
ORDERING INFORMATION
Commerical range: V
CC
= 5 V
±
10 %; T
amb
= 0
°
C to +70
°
C
Type number
Package
Name Description Version
N74F543D SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
N74F543DB SSOP24 plastic shrink small outline pacakge; 24 leads; body width 5.3 mm SOT340-1
N74F543N DIP24 plastic dual in-line package; 24 leads (300 mil) SOT222–1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 - A7 Port A, 3-State inputs 3.5/1.0 70 µA/0.6 mA
B0 - B7 Port B, 3-State inputs 3.5/1.0 70 µA/0.6 mA
OEAB A-to-B Output Enable input (Active LOW) 1.0/1.0 20 µA/0.6 mA
OEBA B-to-A Output Enable input (Active LOW) 1.0/1.0 20 µA/0.6 mA
EAB A-to-B Enable input (Active LOW) 1.0/2.0 20 µA/1.2 mA
EBA B-to-A Enable input (Active LOW) 1.0/2.0 20 µA/1.2 mA
LEAB A-to-B Latch Enable input (Active LOW) 1.0/1.0 20 µA/0.6 mA
LEBA B-to-A Latch Enable input (Active LOW) 1.0/1.0 20 µA/0.6 mA
A0 - A7 Port A, 3-State outputs 150/40 3.0 mA/24 mA
B0 - B7 Port B, 3-State outputs 750/106.7 15 mA/64 mA
NOTE: One (1.0) FAST Unit Load is defined as: 20 µA in the HIGH State and 0.6mA in the LOW state.
