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P3PSL450AHG-08CR

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2010
July, 2010 − Rev. 1
1 Publication Order Number:
P3PSL450A/D
P3PSL450A
Low Voltage, Timing-Safe]
Peak EMI Reduction IC
Functional Description
P3PSL450A/AH is a versatile low voltage peak EMI reduction IC
based on Timing−Safe technology. P3PSL450A/AH accepts one input
from an external reference, and locks on to it delivering a 1x
Timing−Safe output clock. P3PSL450A/AH has a Frequency
Selection (FS) control that facilitates selecting one of the two
frequency ranges within the operating frequency range. Refer
frequency Selection table. The device has an SSEXTR pin to select
different deviations depending upon the value of an external resistor
connected at this pin to GND. P3PSL450A/AH has an MR pin for
selecting one of the two Modulation Rates. PD# provides the Power
Down option.
P3PSL450A is a Low drive part and P3PSL450AH is a High drive
part. Refer to DC/AC Electrical characteristic table.
P3PSL450A/AH operates over a supply voltage range of 1.8 V $
0.2 V, and is available in an 8 Pin WDFN (2 mm x 2 mm) Package.
General Features
• 1x, LVCMOS Timing−Safe Peak EMI Reduction
• Input Clock Frequency: 15 MHz − 60 MHz
• Output Clock Frequency (Timing−Safe): 15 MHz − 60 MHz
• Analog Frequency Deviation Selection
• Two different Modulation Rate Selection Option
• Power Down option for Power Save
• Low and High Drive Parts
• Supply Voltage: 1.8 V $ 0.2 V
• 8 Pin WDFN (2 mm X 2 mm) Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Application
• P3PSL450A/AH is targeted for use in consumer electronic
applications like mobile phones, Camera modules, MFP and DPF
VDD
GND
SSEXTR
CLKIN
ModOUT
(Timing−Safe)
PLL
FS
PD#
MR
Figure 1. Block Diagram
WDFN8
CASE 511AQ
MARKING
DIAGRAM
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1
XX = Specific Device Code
M = Date Code
G = Pb−Free Device
XX MG
G
1
1
2
3
4
8
7
6
5
CLKIN
FS
PD#
GND
VDD
SSEXTR
MR
ModOUT
PIN CONFIGURATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
P3PSL450A
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2
Table 1. PIN DESCRIPTION
Pin # Pin Name Type Description
1 CLKIN I External reference Clock input.
2 FS I Frequency Select. Has an internal pull−down resistor. see Frequency Selection table
3 PD# I Power Down. Pull LOW to enable Power Down. Pull HIGH to disable power down.
Output Clock will be LOW when power down is enabled. Has an internal pull−up resistor
4 GND P Ground
5 ModOUT O Buffered modulated Timing−Safe clock output
6 MR I Modulation Rate Select. When LOW selects Low Modulation Rate. Selects High
Modulation Rate when pulled HIGH. Has an internal pull−up resistor.
7 SSEXTR I Analog Frequency Deviation Selection through external resistor to GND.
8 VDD P 1.8 V Supply Voltage
Table 2. FREQUENCY SELECTION TABLE
FS Frequency (MHz)
0 15−30
1 30−60
Table 3. ABSOLUTE MAXIMUM RATING
Parameter Min Max Unit
Supply Voltage to Ground Potential −0.3 +2.7 V
DC Input Voltage(CLKIN) −0.3 +2.7 V
DC Input Voltage (Except CLKIN) −0.3 V
DD
+ 0.3 V
Storage Temperature −65 +150 °C
Max. Soldering Temperature (10 sec) 260 °C
Junction Temperature 150 °C
Static Discharge Voltage
(As per JEDEC STD22−A114−B)
2000 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
DD
Supply Voltage 1.6 2 V
T
A
Operating Temperature −20 +85 °C
C
L
Load Capacitance 15 pF
C
IN
Input Capacitance 7 pF
P3PSL450A
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3
Table 5. DC ELECTRICAL CHARACTERISTICS FOR V
DD
= 1.8 V $ 0.2 V
Symbol Parameter Test Conditions Min Typ Max Unit
VDD Supply Voltage 1.6 1.8 2 V
V
IH
Input HIGH Voltage 0.65 * V
DD
V
V
IL
Input LOW Voltage 0.35 * V
DD
V
I
IH
Input HIGH Current V
IN
= V
DD
5
mA
I
IL
Input LOW Current V
IN
= 0 V 5
mA
V
OH
Output HIGH Voltage
I
OH
= −8 mA (P3PSL450A)
0.75 * V
DD
V
I
OH
= −16 mA (P3PSL450AH)
V
OL
Output LOW Voltage
I
OL
= 8 mA (P3PSL450A)
0.25 * V
DD
V
I
OL
= 16 mA (P3PSL450AH)
I
CC
Static Supply Current CLKIN & PD# pins pulled to GND 10
mA
I
DD
Dynamic Supply Current Unloaded
Output
FS = 0, @ 15 MHz 1.7 2.2
mA
FS = 0, @ 30 MHz 3.0 3.7
FS = 1, @ 30 MHz 2.6 3.7
FS = 1, @ 60 MHz 4.3 6.4
Z
o
Output Impedance
P3PSL450A 23 W
P3PSL450AH 17
Table 6. AC ELECTRICAL CHARACTERISTICS FOR V
DD
= 1.8 V $ 0.2 V
Parameter Test Conditions Min Typ Max Unit
Input Frequency
FS = 0 15 30
MHz
FS = 1 30 60
ModOUT
FS = 0 15 30
FS = 1 30 60
Duty Cycle
(Notes 1 and 2)
Measured at V
DD
/ 2 45 50 55 %
Rise Time
(Notes 1 and 2)
Measured between 20% to
80%
P3PSL450A 1.3 2.1
ns
P3PSL450AH 1 1.7
Fall Time
(Notes 1 and 2)
Measured between 80% to
20%
P3PSL450A 1.3 2.1
ns
P3PSL450AH 1 1.7
Cycle−to−Cycle Jitter
(Note 2)
Unloaded output with
SSEXTR pin OPEN
FS = 0
15 MHz $150 $250
ps
24 MHz $100 $150
30 MHz $80 $150
FS = 1
30 MHz $150 $250
60 MHz $100 $150
PLL Lock Time
2
Stable power supply, valid clock presented on CLKIN pin,
PD# toggled from Low to High
1 ms
1. All parameters are specified with 15 pF loaded output.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
P1-P3P4-P6P7-P9

P3PSL450AHG-08CR

Mfr. #:
Buy P3PSL450AHG-08CR
Manufacturer:
ON Semiconductor
Description:
Phase Locked Loops - PLL 20-100MHZ 1.8V TS EMI
Lifecycle:
New from this manufacturer.
Delivery:
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