L4979D, L4979MD Application information
Doc ID 10262 Rev 9 11/22
Table 10. Reset time diagram
3.3 Watchdog
The watchdog input W
i
monitors a connected microcontroller. If pulses are missing, the
reset output R
es
is set to low. The pulse sequence time can be set within a wide range
through the external capacitor C
tw
. The watchdog circuit discharges the capacitor C
tw
with
the constant current I
cwd
. If the lower threshold V
wlth
is reached, a watchdog reset is
generated. To prevent this reset, the microcontroller must generate a positive edge during
the discharge of the capacitor before the voltage has reached the threshold V
wlth
. In order to
calculate the minimum time T
dis
during which the microcontroller must generate the positive
edge, the following equation can be used:
Each W
i
positive edge switches the current source from discharging to charging; the same
happens when the lower V
wlth
threshold is reached. When the voltage reaches the upper
threshold V
whth
the current switches from charging to discharging. The result is a saw tooth
voltage at the watchdog timer capacitor C
tw
.
Figure 4. Watchdog time diagram
TRR
TRR
TRD4OSC
4OSC
6RHTH
6RLTH
2ES
6CR
6O
7I
6OUT?TH
'!0'#&4
V
whth
V
wlth
–C
tw
I
cwd
T
dis
=
2ES
6CW
7I
6W
LTH
6WHTH
TWOL
4WO P
4DIS
'!0'#&4