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74ABT373ADB,112

P1-P3P4-P6P7-P9P10-P11
Philips Semiconductors Product specification
74ABT373AOctal transparent latch (3-State)
1995 Feb 17
4
ABSOLUTE MAXIMUM RATINGS
1,
2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current V
I
< 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current V
O
< 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min Max
UNIT
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 5 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
Philips Semiconductors Product specification
74ABT373AOctal transparent latch (3-State)
1995 Feb 17
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
Min Typ Max Min Max
V
IK
Input clamp voltage V
CC
= 4.5V; I
IK
= –18mA –0.9 –1.2 –1.2 V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5 2.9 2.5 V
V
OH
High-level output voltage V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0 3.4 3.0 V
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
2.0 2.4 2.0 V
V
OL
Low-level output voltage V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.3 0.55 0.55 V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13 0.55 0.55 V
I
I
Input leakage current V
CC
= 5.5V; V
I
= GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
OFF
Power-off leakage current V
CC
= 0.0V; V
O
or V
I
≤ 4.5V ±5.0 ±100 ±100 µA
I
PU
/I
PD
Power-up/down 3-State
output current
V
CC
= 2.0V; V
O
= 0.5V; V
OE
= Don’t Care V
1
= GND or V
CC
±5.0 ±50 ±50 µA
I
OZH
3-State output High current V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
0.1 50 50 µA
I
OZL
3-State output Low current V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
–0.1 –50 –50 µA
I
CEX
Output High leakage current V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0 50 50 µA
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V –50 –100 –180 –50 –180 mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
100 250 250 µA
I
CCL
Quiescent suppl
y
current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
24 30 30 mA
I
CCZ
Quiescent
su ly
current
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
100 250 250 µA
∆I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Max Min Max
t
PLH
t
PHL
Propagation delay
Dn to Qn
2
1.4
1.4
3.2
3.6
4.2
4.7
1.4
1.4
4.7
5.1
ns
t
PLH
t
PHL
Propagation delay
E to Qn
1
1.4
1.9
3.2
3.7
4.2
4.8
1.4
1.9
4.8
5.1
ns
t
PZH
t
PZL
Output enable time
to High and Low level
4
5
1.2
2.1
3.1
4.2
4.2
5.2
1.2
2.1
5.1
5.7
ns
t
PHZ
t
PLZ
Output disable time
from High and Low level
4
5
1.3
1.2
3.4
3.0
4.6
4.1
1.3
1.2
5.1
4.3
ns
Philips Semiconductors Product specification
74ABT373AOctal transparent latch (3-State)
1995 Feb 17
6
AC SETUP REQUIREMENTS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to +85
o
C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Min
t
s
(H)
t
s
(L)
Setup time, High or Low
Dn to E
3
1.5
1.0
0.7
0.4
1.5
1.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
Dn to E
3
1.0
1.0
0.0
–0.5
1.0
1.0
ns
t
w
(H)
E pulse width
High
1 2.5 1.7 2.5 ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
t
w
(H)
t
PHL
t
PLH
E
Qn
SA00063
V
M
V
M
V
M
V
M
V
M
Waveform 1. Propagation Delay, Enable to Output, and Enable
Pulse Width
V
M
V
M
V
M
V
M
Qn
Dn
t
PLH
t
PHL
SA00064
Waveform 2. Propagation Delay for Data to Outputs
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
V
M
Dn
V
M
V
M
V
M
V
M
E
t
s
(H)
t
h
(H)
t
s
(L)
t
h
(L)
SA00065
V
M
Waveform 3. Data Setup and Hold Times
OE
V
M
t
PZH
t
PHZ
0V
Qn
V
M
V
M
SA00066
V
OH
–0.3V
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
OE
t
PZL
t
PLZ
0V
Qn
V
M
V
M
V
M
SA00067
V
OL
+0.3V
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
P1-P3P4-P6P7-P9P10-P11

74ABT373ADB,112

Mfr. #:
Buy 74ABT373ADB,112
Manufacturer:
NXP Semiconductors
Description:
Latches D-TYPE TRANSPARENT
Lifecycle:
New from this manufacturer.
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