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74LVC1G86GN,132

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
74LVC1G86
2-input EXCLUSIVE-OR gate
Rev. 12 — 9 March 2017 Product data sheet
1 General description
The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of
these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial Power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
2 Features and benefits
• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• Complies with JEDEC standard:
– JESD8-7 (1.65 V to 1.95 V)
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM JESD22-A114F exceeds 2 000 V
– MM JESD22-A115-A exceeds 200 V
• ±24 mA output drive (V
CC
= 3.0 V)
• CMOS low power consumption
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74LVC1G86
2-input EXCLUSIVE-OR gate
74LVC1G86 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 12 — 9 March 2017
2 / 19
3 Ordering information
Table 1. Ordering information
PackageType number
Temperature
range
Name Description Version
74LVC1G86GW -40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74LVC1G86GV -40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G86GM -40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
74LVC1G86GF -40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
74LVC1G86GN -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
74LVC1G86GS -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
74LVC1G86GX -40 °C to +125 °C X2SON5 X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads; 5 terminals;
body 0.8 x 0.8 x 0.35 mm
SOT1226
4 Marking
Table 2. Marking codes
Type number Marking
[1]
74LVC1G86GW VH
74LVC1G86GV V86
74LVC1G86GM VH
74LVC1G86GF VH
74LVC1G86GN VH
74LVC1G86GS VH
74LVC1G86GX VH
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5 Functional diagram
mna038
B
A
Y
2
1
4
Figure 1. Logic symbol
1
2
= 1
4
mna039
Figure 2. IEC logic symbol
mna040
Y
B
A
Figure 3. Logic diagram
Nexperia
74LVC1G86
2-input EXCLUSIVE-OR gate
74LVC1G86 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 12 — 9 March 2017
3 / 19
6 Pinning information
6.1 Pinning
74LVC1G86
B V
CC
A
GND Y
001aaf186
1
2
3
5
4
Figure 4. Pin configuration SOT353-1 and SOT753
74LVC1G86
A
001aaf187
B
GND
n.c.
V
CC
Y
Transparent top view
2
3
1
5
4
6
Figure 5. Pin configuration SOT886
74LVC1G86
A
001aaf259
B
GND
n.c.
V
CC
Y
Transparent top view
2
3
1
5
4
6
Figure 6. Pin configuration SOT891, SOT1115 and
SOT1202
B V
CC
GND
1
3
2
5
4
A
Y
aaa-003031
Transparent top view
74LVC1G86
Figure 7. Pin configuration SOT1226 (X2SON5)
6.2 Pin description
Table 3. Pin description
PinSymbol
TSSOP5 and X2SON5 XSON6
Description
B 1 1 data input
A 2 2 data input
GND 3 3 ground (0 V)
Y 4 4 data output
n.c. - 5 not connected
V
CC
5 6 supply voltage
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

74LVC1G86GN,132

Mfr. #:
Buy 74LVC1G86GN,132
Manufacturer:
Nexperia
Description:
Logic Gates OR 0.5 V 50 mA
Lifecycle:
New from this manufacturer.
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