ISL9007
7
FN9218.3
February 11, 2014
Functional Description
The ISL9007 contains all circuitry required to implement a high
performance LDO. High performance is achieved through a
circuit that delivers fast transient response to varying load
conditions. In a quiescent condition, the ISL9007 adjusts its
biasing to achieve the lowest standby current consumption.
The device also integrates current limit protection, smart thermal
shutdown protection, and soft-start. Smart thermal shutdown
protects the device against overheating. Soft-start minimize
start-up input current surges without causing excessive device
turn-on time.
Power Control
The ISL9007 has a shutdown pin (SD) to control power to the LDO
output. When SD is high, the device is in shutdown mode. In this
condition, all on-chip circuits are off, and the device draws
minimum current, typically less than 0.1µA. When the SD pin
goes low, the device first polls the output of the UVLO detector to
ensure that the VIN voltage is at least 2.1V (typical). Once
verified, the device initiates a start-up sequence. During the
start-up sequence, trim settings are first read and latched. Then,
sequentially, the bandgap, reference voltage and current
generation circuitry turn-on. Once the references are stable, the
LDO powers up.
During operation, whenever the VIN voltage drops below about
1.84V, the ISL9007 immediately disables both LDO outputs.
When VIN rises back above 2.1V (assuming the SD pin is low),
the device re-initiates its start-up sequence and LDO operation
will resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed bandgap,
a trimmed voltage reference divider, a trimmed current reference
generator, and an RC noise filter.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage references
required for current generation and over-temperature detection.
A current generator provides references required for adaptive
biasing as well as references for LDO output current limit and
thermal shutdown determination.
LDO Regulation and Programmable Output
Divider
The LDO Regulator is implemented with a high-gain operational
amplifier driving a PMOS pass transistor. The design of the
ISL9000 provides a regulator that has low quiescent current, fast
transient response, and overall stability across all operating and
load current conditions. LDO stability is guaranteed for a 1µF to
10µF output capacitor that has a tolerance better than 20% and
ESR less than 200mΩ. The design is performance-optimized for
a 1µF capacitor. Unless limited by the application, use of an
output capacitor value above 4.7µF is not recommended as LDO
performance improvement is minimal.
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30µs/V to minimize current surge. The
ISL9007 provides short-circuit protection by limiting the output
current to about 500mA.
The LDO uses an independently trimmed 1V reference as its
input. An internal resistor divider drops the LDO output voltage
down to 1V. This is compared to the 1V reference for regulation.
The resistor division ratio is programmed in the factory to one of
the following output voltages: 3.3, 2.85V, 2.8V, and 2.5V.
Overheat Detection
The bandgap outputs a proportional-to-temperature current that
is indicative of the temperature of the silicon. This current is
compared with references to determine if the device is in danger
of damage due to overheating. When the die temperature
reaches about +145°C, the LDO momentarily shuts down until
the die cools sufficiently. In the overheat condition, if the LDO
sources more than 50mA it will be shut off. Once the die
temperature falls back below about +110°C, the disabled LDO is
re-enabled and soft-start automatically takes place.
