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AT25640T2-10TI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
4
AT25080/160/320/640
0675F–08/01
AC Characteristics
Applicable over recommended operating range from T
A
= -40°C to +85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Voltage Min Max Units
f
SCK
SCK Clock Frequency 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
3.0
2.1
0.5
MHz
t
RI
Input Rise Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
2
2
2
µs
t
FI
Input Fall Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
2
2
2
µs
t
WH
SCK High Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
133
200
800
ns
t
WL
SCK Low Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
133
200
800
ns
t
CS
CS High Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
250
250
1000
ns
t
CSS
CS Setup Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
250
250
1000
ns
t
CSH
CS Hold Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
250
250
1000
ns
t
SU
Data In Setup Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
50
50
100
ns
t
H
Data In Hold Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
50
50
100
ns
t
HD
Hold Setup Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
100
100
400
t
CD
Hold Hold Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
200
200
400
ns
t
V
Output Valid 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
133
200
800
ns
t
HO
Output Hold Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
ns
5
AT25080/160/320/640
0675F–08/01
Note: 1. This parameter is characterized and is not 100% tested.
t
LZ
Hold to Output Low Z 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
100
100
100
ns
t
HZ
Hold to Output High Z 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
100
100
100
ns
t
DIS
Output Disable Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
250
250
1000
ns
t
WC
Write Cycle Time 4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
5
10
20
ms
Endurance
(1)
5.0V, 25°C, Page Mode 1M Write Cycles
AC Characteristics (Continued)
Applicable over recommended operating range from T
A
= -40°C to +85° C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Voltage Min Max Units
6
AT25080/160/320/640
0675F–08/01
Serial Interface
Description
MASTER: The device that generates the serial clock.
SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25080/160/320/640
always operates as a slave.
TRANSMITTER/RECEIVER: The AT25080/160/320/640 has separate pins designated for
data transmission (SO) and reception (SI).
MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.
SERIAL OP-CODE: After the device is selected with CS
going low, the first byte will be
received. This byte contains the op-code that defines the operations to be performed.
INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the
AT25080/160/320/640, and the serial output pin (SO) will remain in a high impedance state
until the falling edge of CS
is detected again. This will reinitialize the serial communication.
CHIP SELECT: The AT25080/160/320/640 is selected when the CS
pin is low. When the
device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO)
will remain in a high impedance state.
HOLD: The HOLD
pin is used in conjunction with the CS pin to select the
AT25080/160/320/640. When the device is selected and a serial sequence is underway,
HOLD
can be used to pause the serial communication with the master device without resetting
the serial sequence. To pause, the HOLD
pin must be brought low while the SCK pin is low.
To resume serial communication, the HOLD
pin is brought high while the SCK pin is low (SCK
may still toggle during HOLD
). Inputs to the SI pin will be ignored while the SO pin is in the
high impedance state.
WRITE PROTECT: The write protect pin (WP) will allow normal read/write operations when
held high. When the WP pin is brought low and WPEN bit is “1”, all write operations to the sta-
tus register are inhibited. WP
going low while CS is still low will interrupt a write to the status
register. If the internal write cycle has already been initiated, WP
going low will have no effect
on any write operation to the status register. The WP
pin function is blocked when the WPEN
bit in the status register is "0". This will allow the user to install the AT25080/160/320/640 in a
system with the WP
pin tied to ground and still be able to write to the status register. All WP
pin functions are enabled when the WPEN bit is set to “1”.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

AT25640T2-10TI

Mfr. #:
Buy AT25640T2-10TI
Manufacturer:
Description:
IC EEPROM 64K SPI 3MHZ 20TSSOP
Lifecycle:
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