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HEF4093BT-Q100,118

P1-P3P4-P6P7-P9P10-P12P13-P15
HEF4093B_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 12 July 2012 3 of 14
NXP Semiconductors
HEF4093B-Q100
Quad 2-input NAND Schmitt trigger
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
[1] For SO14 package: above T
amb
= 70 C, P
tot
derates linearly with 8 mW/K.
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 5, 8, 12 input
1B to 4B 2, 6, 9, 13 input
1Y to 4Y 3, 4, 10, 11 output
V
DD
14 supply voltage
V
SS
7 ground (0 V)
Table 3. Function table
[1]
Input Output
nA nB nY
LLH
LHH
HLH
HHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 0.5 +18 V
I
IK
input clamping current V
I
< 0.5 V or V
I
>V
DD
+ 0.5 V - 10 mA
V
I
input voltage 0.5 V
DD
+ 0.5 V
I
OK
output clamping current V
O
< 0.5 V or V
O
>V
DD
+ 0.5 V - 10 mA
I
I/O
input/output current - 10 mA
I
DD
supply current - 50 mA
T
stg
storage temperature 65 +150 C
T
amb
ambient temperature 40 +125 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
SO14
[1]
-500mW
P power dissipation per output - 100 mW
HEF4093B_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 12 July 2012 4 of 14
NXP Semiconductors
HEF4093B-Q100
Quad 2-input NAND Schmitt trigger
9. Recommended operating conditions
10. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 3 15 V
V
I
input voltage 0 V
DD
V
T
amb
ambient temperature in free air 40 +125 C
Table 6. Static characteristics
V
SS
= 0 V; V
I
=V
SS
or V
DD
; unless otherwise specified.
Symbol Parameter Conditions V
DD
T
amb
= 40 C T
amb
= +25 C T
amb
= +85 C T
amb
= +125 C Unit
Min Max Min Max Min Max Min Max
V
OH
HIGH-level
output voltage
I
O
< 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
V
OL
LOW-level
output voltage
I
O
< 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
I
OH
HIGH-level
output current
V
O
= 2.5 V 5 V 1.7 - 1.4 - 1.1 - 1.1 - mA
V
O
= 4.6 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA
V
O
= 9.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
V
O
= 13.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
I
OL
LOW-level
output current
V
O
= 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA
V
O
= 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
V
O
= 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
I
I
input leakage
current
15 V - 0.1 - 0.1 - 1.0 - 1.0 A
I
DD
supply current all valid input
combinations;
I
O
=0A
5 V - 0.25 - 0.25 - 7.5 - 7.5 A
10 V - 0.5 - 0.5 - 15.0 - 15.0 A
15 V - 1.0 - 1.0 - 30.0 - 30.0 A
C
I
input
capacitance
---7.5-- - -pF
HEF4093B_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 12 July 2012 5 of 14
NXP Semiconductors
HEF4093B-Q100
Quad 2-input NAND Schmitt trigger
11. Dynamic characteristics
[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
L
in pF).
Table 7. Dynamic characteristics
T
amb
= 25
C; C
L
= 50 pF; t
r
= t
f
20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.
Symbol Parameter Conditions V
DD
Extrapolation formula
[1]
Min Typ Max Unit
t
PHL
HIGH to LOW
propagation delay
nA or nB to nY 5 V 63 ns + (0.55 ns/pF)C
L
- 90 185 ns
10 V 29 ns + (0.23 ns/pF)C
L
-4080ns
15 V 22 ns + (0.16 ns/pF)C
L
-3060ns
t
PLH
LOW to HIGH
propagation delay
nA or nB to nY 5 V 58 ns + (0.55 ns/pF)C
L
- 85 170 ns
10 V 29 ns + (0.23 ns/pF)C
L
-4080ns
15 V 22 ns + (0.16 ns/pF)C
L
-3060ns
t
THL
HIGH to LOW output
transition time
nY to LOW 5 V 10 ns + (1.00 ns/pF)C
L
- 60 120 ns
10 V 9 ns + (0.42 ns/pF)C
L
-3060ns
15 V 6 ns + (0.28 ns/pF)C
L
-2040ns
t
TLH
LOW to HIGH output
transition time
nA or nB to
HIGH
5 V 10 ns + (1.00 ns/pF)C
L
- 60 120 ns
10 V 9 ns + (0.42 ns/pF)C
L
-3060ns
15 V 6 ns + (0.28 ns/pF)C
L
-2040ns
Table 8. Dynamic power dissipation
V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol Parameter V
DD
Typical formula where:
P
D
dynamic power
dissipation
5V P
D
= 1300 f
i
+ (f
o
C
L
) V
DD
2
(W) f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
(f
o
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
10 V P
D
= 6400 f
i
+ (f
o
C
L
) V
DD
2
(W)
15 V P
D
= 18700 f
i
+ (f
o
C
L
) V
DD
2
(W)
P1-P3P4-P6P7-P9P10-P12P13-P15

HEF4093BT-Q100,118

Mfr. #:
Buy HEF4093BT-Q100,118
Manufacturer:
Nexperia
Description:
Logic Gates Quad 2-Input NAND Schmitt Trigger
Lifecycle:
New from this manufacturer.
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