74AUP2G02 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 4 February 2013 8 of 21
NXP Semiconductors
74AUP2G02
Low-power dual 2-input NOR gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 25 C T
amb
= 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
C
L
= 5 pF
t
pd
propagation delay nA, nB to nY; see Figure 8
[2]
V
CC
= 0.8 V - 17.0 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.5 5.1 10.8 2.1 12.1 13.4 ns
V
CC
= 1.4 V to 1.6 V 1.6 3.7 6.7 1.4 7.8 8.6 ns
V
CC
= 1.65 V to 1.95 V 1.3 3.0 5.3 1.1 6.2 6.9 ns
V
CC
= 2.3 V to 2.7 V 1.0 2.4 3.9 0.9 4.6 5.1 ns
V
CC
= 3.0 V to 3.6 V 1.0 2.2 3.4 0.8 4.0 4.4 ns
C
L
= 10 pF
t
pd
propagation delay nA, nB to nY; see Figure 8
[2]
V
CC
= 0.8 V - 20.4 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.4 6.0 12.8 2.2 14.3 15.8 ns
V
CC
= 1.4 V to 1.6 V 1.9 4.3 7.9 1.7 9.2 10.2 ns
V
CC
= 1.65 V to 1.95 V 1.6 3.6 6.2 1.5 7.3 8.1 ns
V
CC
= 2.3 V to 2.7 V 1.4 3.0 4.7 1.2 5.6 6.2 ns
V
CC
= 3.0 V to 3.6 V 1.3 2.7 4.2 1.2 5.0 5.5 ns
C
L
= 15 pF
t
pd
propagation delay nA, nB to nY; see Figure 8
[2]
V
CC
= 0.8 V - 23.9 - - - - ns
V
CC
= 1.1 V to 1.3 V 3.4 6.8 14.6 3.1 16.4 18.1 ns
V
CC
= 1.4 V to 1.6 V 2.3 4.8 8.9 2.0 10.4 11.5 ns
V
CC
= 1.65 V to 1.95 V 1.9 4.0 7.0 1.7 8.3 9.2 ns
V
CC
= 2.3 V to 2.7 V 1.7 3.4 5.4 1.5 6.3 7.0 ns
V
CC
= 3.0 V to 3.6 V 1.6 3.2 4.8 1.4 5.7 6.3 ns
C
L
= 30 pF
t
pd
propagation delay nA, nB to nY; see Figure 8
[2]
V
CC
= 0.8 V - 34.2 - - - - ns
V
CC
= 1.1 V to 1.3 V 4.6 9.0 19.9 4.1 22.4 24.7 ns
V
CC
= 1.4 V to 1.6 V 3.4 6.4 11.8 2.9 13.9 15.3 ns
V
CC
= 1.65 V to 1.95 V 2.6 5.3 9.3 2.3 11.1 12.3 ns
V
CC
= 2.3 V to 2.7 V 2.4 4.5 7.1 2.1 8.5 9.4 ns
V
CC
= 3.0 V to 3.6 V 2.3 4.2 6.4 2.1 7.7 8.5 ns