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SI9112DY-T1-E3

P1-P3P4-P6P7-P9
Si9112
Vishay Siliconix
www.vishay.com
4
Document Number: 70005
S-42036—Rev. H, 15-Nov-04
TIMING WAVEFORMS
FIGURE 1.
90%
OUTPUT
SENSE
1.5 V −
50%
0
90%
OUTPUT
0 −
50%
t
d
V
CC
V
CC
V
CC
t
SD
SHUTDOWN
0 −0 −
0 −
50% 50%
50% 50%
RESET
0 −
V
CC
V
CC
t
SW
t
LW
t
RW
SHUTDOWN
t
f
, t
f
v 10 ns
50%
FIGURE 2.
FIGURE 3.
t
r
v 10 ns
t
f
v 10 ns
TYPICAL CHARACTERISTICS
+V
IN
vs. +I
IN
at Start-Up
Output Switching Frequency
vs. Oscillator Resistance
140
120
100
80
60
40
20
0
10 15 20
1 M
10 k
100 k
10 k
100 k 1 M
V
CC
= −V
IN
r
OSC
− Oscillator Resistance ()
(V)
IN
+V
(Hz)f
OUT
+I
IN
(mA)
FIGURE 4. FIGURE 5.
BIAS FB
+V
IN
COMP
SENSE RESET
OUTPUT
SHUTDOWN
−V
IN
V
REF
V
CC
DISCHARGE
OSC OUT OSC IN
Dual-In-Line and SOIC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Top View
Si9112
Vishay Siliconix
Document Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
5
PIN CONFIGURATIONS AND ORDERING INFORMATION
ORDERING INFORMATION
Part Number Temperature Range Package
Si9112DY
Si9112DY-T1 SOIC-14
Si9112DY-T1—E3 −40 to 85_C
Si9112DJ
PDIP-14
Si9112DJ—E3
PDIP
-
1
4
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9112
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
When power is first applied during start-up, +V
IN
(pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between +V
IN
and V
CC
(pin 6). This
start-up circuitry provides initial power to the IC by charging an
external bypass capacitance connected to the V
CC
pin. The
charging current is disabled when V
CC
exceeds 8.7 V. If V
CC
is
not forced to exceed the 8.7-V threshold, then V
CC
will be
regulated to a nominal value of 8.7 V by the pre-regulator
circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output driver disabled until V
CC
exceeds the UV lockout
threshold (typically 8.1 V). This guarantees that the control
logic will be functioning properly and that sufficient gate drive
voltage is available before the MOSFET turns on. The design
of the IC is such that the undervoltage lockout threshold will be
at least 300 mV less than the pre-regulator turn-off voltage.
Power dissipation can be minimized by providing an external
power source to V
CC
such that the pre-regulator circuit is
disabled.
BIAS
To properly set the bias for the Si9112, a 270-k
resistor
should be tied from BIAS (pin 1) to −V
IN
(pin 5). This
determines the magnitude of bias current in all of the analog
sections and the pull-up current for the SHUTDOWN
and
RESET pins. The current flowing in the bias resistor is
nominally 15 A.
Reference Section
The reference section of the Si9112 consists of a temperature
compensated buried zener and trimmable divider network.
The output of the reference section is connected internally to
the non-inverting input of the error amplifier. Nominal reference
output voltage is 4 V. The trimming procedure that is used on
the Si9112 brings the output of the error amplifier (which is
configured for unity gain during trimming) to within "2% of 4 V.
This automatically compensates for input offset voltage in the
error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external voltage
source can be used to override the internal voltage source, if
desired, without otherwise altering the performance of the
device.
Error Amplifier
Closed-loop regulation is provided by the error amplifier. The
emitter follower output has a typical dynamic output
impedance of 1000
, and is intended for use with
“around-the-amplifier” compensation. A MOS differential input
stage provides low input leakage current. The noninverting
input to the error amplifier (V
REF
) is internally connected to the
output of the reference supply and should be bypassed with a
small capacitor to ground.
Si9112
Vishay Siliconix
www.vishay.com
6
Document Number: 70005
S-42036—Rev. H, 15-Nov-04
DETAILED DESCRIPTION (CONT’D)
Oscillator Section
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. Frequency is set by an
external resistor between the OSC IN and OSC OUT pins.
(See Typical Characteristics for details of resistor value vs.
frequency.) The DISCHARGE pin should be tied to −V
IN
for
normal internal oscillator operation. A frequency divider in the
logic section limits switch duty cycle to v50% by locking the
switching frequency to one half of the oscillator frequency.
Remote synchronization can be accomplished by capacitive
coupling of a SYNC pulse into the OSC IN (pin 8) terminal. For
a 5-V pulse amplitude and 0.5-s pulse width, typical values
would be 100 pF in series with 3 k
to pin 8.
SHUTDOWN
and RESET
SHUTDOWN
(pin 11) and RESET (pin 12) are intended for
overriding the output MOSFET switch via external control
logic. The two inputs are fed through a latch preceding the
output switch. Depending on the logic state of RESET,
SHUTDOWN
can be either a latched or unlatched input. The
output is off whenever SHUTDOWN
is low. By simultaneously
having SHUTDOWN
and RESET low, the latch is set and
SHUTDOWN
has no effect until RESET goes high. The truth
table for these inputs is given in Table 1.
Table 1: Truth Table for the SHUTDOWN
and RESET Pins
SHUTDOWN RESET Output
H H Normal Operation
H Normal Operation (No Change)
L H Off (Not Latched)
L L Off (Latched)
L Off (Latched, No Change)
Both pins have internal current source pull-ups and should be
left disconnected when not in use. An added feature of the
current sources is the ability to connect a capacitor and an
open-collector driver to the SHUTDOWN
or RESET pins to
provide variable shutdown time.
Output Driver
The push-pull driver output has a typical on-resistance of 20 .
Maximum switching times are specified at 75 ns for a 500 pF
load. This is sufficient to directly drive 60-V, 25-A MOSFETs.
Larger devices can be driven, but switching times will be
longer, resulting in higher switching losses.
For applications information refer to AN703.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?70005.
P1-P3P4-P6P7-P9

SI9112DY-T1-E3

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Buy SI9112DY-T1-E3
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Description:
Switching Controllers Hi-Eff/Hi-Voltage Switchmode
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