LTC2911
9
2911f
APPLICATIONS INFORMATION
The LTC2911 is a low power, high accuracy triple supply
monitor with power-fail comparator.
For the LTC2911-1,
LTC2911-2, LTC2911-3 and LTC2911-4 options, the V1
and V2 pins monitor two supplies. Their thresholds are
preset internally based on the option chosen. A resistive
divider connected to the ADJ pin configures the third
threshold. For the LTC2911-5, the V2 pin is a high imped-
ance adjustable input similar to the ADJ pin.
Reset timeout of the device may be selected with an external
capacitor or set to an internally generated 200ms. The ADJ,
V1 and V2 inputs must be valid (above their thresholds)
for longer than the reset timeout period before the RST
pin transitions high.
The power-fail comparator causes the PFO pin to pull
low when the PFI pin falls below 0.5V. A resistive divider
connected to the PFI pin configures the threshold of the
monitored voltage. The PFO output typically provides
an early warning of imminent power failure so that the
system may begin shutdown procedures such as supply
sequencing and/or storage of system state in nonvolatile
memory.
Power-Up
The LTC2911-1, LTC2911-2, LTC2911-3 and LTC2911-4
supervisors are powered from the V1 and V2 pins, auto-
matically selecting the pin with the higher potential. The
exception in the device family, the LTC2911-5, derives
its internal supply voltage (V
CC
) only from V1. When all
monitor inputs are above their thresholds, the quiescent
supply current drawn from V
CC
is typically 30µA (35µA
for the LTC2911-1). When the three monitor inputs (V1,
V2 and ADJ) rise above their thresholds, the appropriate
timeout delay begins, after which RST pulls to V1. Once
the PFI input rises above 515mV, the PFO output signals
high indicating that the supply or voltage monitored by
PFI is above threshold.
The LTC2911 uses proprietary low voltage drive circuitry
for the RST and PFO pins which holds them low with
V
CC
(the higher of V1 and V2) as low as 0.5V. This helps
prevent indeterminate voltages from appearing on the
outputs during power-up. For additional details refer to
the Output Pin Characteristics section.
When V1 and V2 are ramped simultaneously (for
LTC2911-1/LTC2911-2/LTC2911-3/LTC2911-4), the pull-
down current from the RST and PFO pins is about twice
the current available when V1 or V2 is grounded.
Power Down
On power-down, when the voltage monitored by the power-
fail comparator falls below the threshold configured by its
resistive divider, the PFO pin pulls low to provide an early
warning of imminent power failure. In a typically config-
ured system, this occurs before the supplies monitored
by V1, V2 or ADJ fall below their thresholds and cause
the RST pin to pull low. The RST and PFO pins maintain
a logic low output for V
CC
as low as 0.5V. See the Output
PIn Characteristics section for additional details.
Power-Fail Monitoring and PFO Signaling
The LTC2911’s PFI input monitors a voltage through a
resistive divider and compares it to the internal power-fail
threshold. When PFI drops below 0.50V (the power-fail
threshold) the PFO output pulls low to provide an early
warning of a low voltage condition. When the PFI pin rises
above 0.515V again, the PFO output signals high indicating
a valid supply condition.
The PFI input typically monitors the primary power supply
of a system. For example, the PFI pin may monitor the
input supply of a DC/DC converter or a Li-Ion battery stack
voltage. The PFO output typically provides a warning to
the system that the power supply is on the verge of fail-
ing so that it can prepare for a controlled shutdown. For
