LTC3412A
7
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pin Functions
SV
IN
(Pin 1/Pin 11): Signal Input Supply. Decouple this
pin to SGND with a capacitor.
PGOOD (Pin 2/Pin 12): Power Good Output. Open-drain
logic output that is pulled to ground when the output volt-
age is not within ±7.5% of regulation point.
I
TH
(Pin 3/Pin 13): Error Amplifier Compensation Point.
The current comparator threshold increases with this
control voltage. Nominal voltage range for this pin is from
0.2V to 1.4V with 0.4V corresponding to the zero-sense
voltage (zero current).
V
FB
(Pin 4/Pin 14): Feedback Pin. Receives the feedback
voltage from a resistive divider connected across the
output.
R
T
(Pin 5/Pin 15): Oscillator Resistor Input. Connecting
a resistor to ground from this pin sets the switching
frequency.
SYNC/MODE (Pin 6/Pin 16): Mode Select and External
Clock Synchronization Input. To select forced continuous,
tie to SV
IN
. Connecting this pin to a voltage between 0V
and 1V selects Burst Mode operation with the burst clamp
set to the pin voltage.
RUN/SS (Pin 7/Pin 1): Run Control and Soft-Start Input.
Forcing this pin below 0.5V shuts down the LTC3412A.
In shutdown all functions are disabled drawing <1µA of
supply current. A capacitor to ground from this pin sets
the ramp time to full output current.
SGND (Pin 8/Pin 2): Signal Ground. All small-signal com-
ponents, compensation components and the exposed pad
on the bottom side of the IC should connect to this ground,
which in turn connects to PGND at one point.
PV
IN
(Pins 9, 16/Pins 3, 10): Power Input Supply. Decouple
this pin to PGND with a capacitor.
SW (Pins 10, 11, 14, 15/Pins 4, 5, 8, 9): Switch Node
Connection to the Inductor. This pin connects to the drains
of the internal main and synchronous power MOSFET
switches.
PGND (Pins 12, 13/Pins 6, 7): Power Ground. Connect
this pin close to the (–) terminal of C
IN
and C
OUT
.
Exposed Pad (Pin 17/Pin 17): Signal Ground. Must be
soldered to PCB for electrical connection and rated thermal
performance.
(FE/UHF)
LTC3412A
8
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FunctionAl block DiAgrAM
operAtion
+
2
7
4
+
+
+
0.74V
ERROR
AMPLIFIER
SYNC/MODE
BURST
COMPARATOR
BCLAMP
NMOS
CURRENT
COMPARATOR
PMOS CURRENT
COMPARATOR
REVERSE
CURRENT
COMPARATOR
0.86V
RUNRUN/SS
15
13
12
14
11
SW
P-CH
N-CH
10
PGOOD
3
I
TH
V
FB
0.8V
5
R
T
6
SYNC/MODE
3412 FBD
16
PV
IN
98
SGND
1
SV
IN
SLOPE
COMPENSATION
VOLTAGE
REFERENCE
OSCILLATOR
LOGIC
SLOPE
COMPENSATION
RECOVERY
+
+
+
PGND
+
Main Control Loop
The LTC3412A is a monolithic, constant-frequency, current
mode step-down DC/DC converter. During normal opera-
tion, the internal top power switch (P-channel MOSFET) is
turned on at the beginning of each clock cycle. Current in
the inductor increases until the current comparator trips
and turns off the top power MOSFET. The peak inductor
current at which the current comparator shuts off the top
power switch is controlled by the voltage on the I
TH
pin.
The error amplifier adjusts the voltage on the I
TH
pin by
comparing the feedback signal from a resistor divider on
the V
FB
pin with an internal 0.8V reference. When the load
current increases, it causes a reduction in the feedback
voltage relative to the reference. The error amplifier raises
the I
TH
voltage until the average inductor current matches
the new load current. When the top power MOSFET shuts
off, the synchronous power switch (N-channel MOSFET)
turns on until either the bottom current limit is reached or
the beginning of the next clock cycle. The bottom current
limit is set at –1.3A for forced continuous mode and 0A
for Burst Mode operation.
LTC3412A
9
3412afe
operAtion
The operating frequency is externally set by an external
resistor connected between the R
T
pin and ground. The
practical switching frequency can range from 300kHz to
4MHz.
Overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage comes out of
regulation by ±7.5%. In an overvoltage condition, the top
power MOSFET is turned off and the bottom power MOSFET
is switched on until either the overvoltage condition clears
or the bottom MOSFETs current limit is reached.
Forced Continuous Mode
Connecting the SYNC/MODE pin to SV
IN
will disable Burst
Mode operation and force continuous current operation.
At light loads, forced continuous mode operation is less
efficient than Burst Mode operation, but may be desirable in
some applications where it is necessary to keep switching
harmonics out of a signal band. The output voltage ripple
is minimized in this mode.
Burst Mode Operation
Connecting the SYNC/MODE pin to a voltage in the range
of 0V to 1V enables Burst Mode operation. In Burst Mode
operation, the internal power MOSFETs operate intermit-
tently at light loads. This increases efficiency by minimiz-
ing switching losses. During Burst Mode operation, the
minimum peak inductor current is externally set by the
voltage on the SYNC/MODE pin and the voltage on the I
TH
pin is monitored by the burst comparator to determine
when sleep mode is enabled and disabled. When the
average inductor current is greater than the load current,
the voltage on the I
TH
pin drops. As the I
TH
voltage falls
below 150mV, the burst comparator trips and enables
sleep mode. During sleep mode, the top power MOSFET
is held off and the I
TH
pin is disconnected from the output
of the error amplifier. The majority of the internal circuitry
is also turned off to reduce the quiescent current to 64µA
while the load current is solely supplied by the output
capacitor. When the output voltage drops, the I
TH
pin is
reconnected to the output of the error amplifier and the
top power MOSFET along with all the internal circuitry is
switched back on. This process repeats at a rate that is
dependent on the load demand.
Pulse-skipping operation is implemented by connecting
the SYNC/MODE pin to ground. This forces the burst
clamp level to be at 0V. As the load current decreases, the
peak inductor current will be determined by the voltage
on the I
TH
pin until the I
TH
voltage drops below 400mV. At
this point, the peak inductor current is determined by the
minimum on-time of the current comparator. If the load
demand is less than the average of the minimum on-time
inductor current, switching cycles will be skipped to keep
the output voltage in regulation.
Frequency Synchronization
The internal oscillator of the LTC3412A can be synchro-
nized to an external clock connected to the SYNC/MODE
pin. The frequency of the external clock can be in the
range of 300kHz to 4MHz. For this application, the oscil-
lator timing resistor should be chosen to correspond to
a frequency that is 25% lower than the synchronization
frequency. During synchronization, the burst clamp is set
to 0V, and each switching cycle begins at the falling edge
of the clock signal.
Dropout Operation
When the input supply voltage decreases toward the output
voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle
eventually reaching 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the internal P-channel MOSFET and
the inductor.
Low Supply Operation
The LTC3412A is designed to operate down to an input
supply voltage of 2.25V. One important consideration at low
input supply voltages is that the R
DS(ON)
of the P-channel
and N-channel power switches increases. The user should
calculate the power dissipation when the LTC3412A is used
at 100% duty cycle with low input voltages to ensure that
thermal limits are not exceeded.

LTC3412AMPFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators High Reliability Temp Range 3A, 4MHz, Monolithic Synchronous Step-Down Regulator in TSSOP-16E
Lifecycle:
New from this manufacturer.
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