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LT3757EMSE#PBF

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LT3757/LT3757A
13
3757afd
applicaTions inForMaTion
FBX Frequency Foldback
When V
OUT
is very low during start-up or a short-circuit
fault on the output, the switching regulator must operate
at low duty cycles to maintain the power switch current
within the current limit range, since the inductor current
decay rate is very low during switch off time. The minimum
on-time limitation may prevent the switcher from attaining
a sufficiently low duty cycle at the programmed switching
frequency. So, the switch current will keep increasing
through each switch cycle, exceeding the programmed
current limit. To prevent the switch peak currents from
exceeding the programmed value, the LT3757 contains
a frequency foldback function to reduce the switching
frequency when the FBX voltage is low (see the Normal-
ized Switching Frequency vs FBX graph in the Typical
Performance Characteristics section).
The typical frequency foldback waveforms are shown
in the Typical Performance Characteristics section. The
frequency foldback function prevents I
L
from exceeding
the programmed limits because of the minimum on-time.
During frequency foldback, external clock synchroniza-
tion is disabled to prevent interference with frequency
reducing operation.
Thermal Lockout
If LT3757 die temperature reaches 165°C (typical), the
part will go into thermal lockout. The power
switch will
be
turned off. A soft-start operation will be triggered. The
part will be enabled again when the die temperature has
dropped by 5°C (nominal).
Loop Compensation
Loop compensation determines the stability and transient
performance. The LT3757/LT3757A use current mode
control to regulate the output which simplifies loop com-
pensation. The LT3757A improves the no-load to heavy
load transient response, when compared to the LT3757.
New internal circuits ensure that the transient from not
switching to switching at high current can be made in a
few cycles.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT3757/LT3757A, a series resistor-
capacitor network is usually connected from the V
C
pin to
GND. Figure 1 shows the typical V
C
compensation network.
For most applications, the capacitor should be in the range
of 470pF to 22nF, and the resistor should be in the range
of 5k to 50k. A small capacitor is often connected in par-
allel with the RC compensation network to attenuate the
V
C
voltage ripple induced from the output voltage ripple
through the internal error amplifier. The parallel capacitor
usually ranges in value from 10pF to 100pF. A practical
approach to design the compensation network is to start
with one of the circuits in this data sheet that is similar
to your application, and tune the compensation network
to optimize the performance. Stability should then be
checked across all operating conditions, including load
current, input voltage and temperature.
SENSE Pin Programming
For control and protection, the LT3757 measures the
power MOSFET current by using a sense resistor (R
SENSE
)
between GND and the MOSFET source. Figure 4 shows a
typical waveform of the sense voltage (V
SENSE
) across the
sense resistor. It is important to use Kelvin traces between
the SENSE pin and R
SENSE
, and to place the IC GND as
close as possible to the GND terminal of the R
SENSE
for
proper operation.
Figure 4. The Sense Voltage During a Switching Cycle
3757 F04
V
SENSE(PEAK)
∆V
SENSE = χ •
V
SENSE(MAX)
V
SENSE
t
DT
S
V
SENSE(MAX)
T
S
LT3757/LT3757A
14
3757afd
applicaTions inForMaTion
Due to the current limit function of the SENSE pin, R
SENSE
should be selected to guarantee that the peak current sense
voltage V
SENSE(PEAK)
during steady state normal operation
is lower than the SENSE current limit threshold (see the
Electrical Characteristics table). Given a 20% margin,
V
SENSE(PEAK)
is set to be 80mV. Then, the maximum
switch ripple current percentage can be calculated using
the following equation:
c =
∆V
SENSE
80mV − 0.5 • ∆V
SENSE
c
is used in subsequent design examples to calculate in-
ductor value. ∆V
SENSE
is the ripple voltage across R
SENSE
.
The LT3757 switching controller incorporates 100ns timing
interval to blank the ringing on the current sense signal
immediately after M1 is turned on. This ringing is caused
by the parasitic inductance and capacitance of the PCB
trace, the sense resistor, the diode, and the MOSFET. The
100ns timing interval is adequate for most of the LT3757
applications. In the applications that have very large and
long ringing on the current sense signal, a small RC filter
can be added to filter out the excess ringing. Figure 5
shows the RC filter on SENSE pin. It is usually sufficient
to choose 22Ω for R
F LT
and 2.2nF to 10nF for C
FLT
.
Keep R
F LT
’s resistance low. Remember that there is 65µA
(typical) flowing out of the SENSE pin. Adding R
F LT
will
affect the SENSE current limit threshold:
V
SENSE_ILIM
= 108mV – 65µA • R
F LT
APPLICATION CIRCUITS
The LT3757 can be configured as different topologies. The
first topology to be analyzed will be the boost converter,
followed by the flyback, SEPIC and inverting converters.
Boost Converter: Switch Duty Cycle and Frequency
The LT3757 can be configured as a boost converter for
the
applications where the converter output voltage is
higher than the input voltage. Remember that boost con-
verters are not short-circuit protected. Under a shorted
output condition, the inductor current is limited only by
the input supply capability. For applications requiring a
step-up converter that is short-circuit protected, please
refer to the Applications Information section covering
SEPIC converters.
The conversion ratio as a function of duty cycle is
V
OUT
V
IN
=
1
1− D
in continuous conduction mode (CCM).
For a boost converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (V
OUT
) and the input voltage (V
IN
). The maximum
duty cycle (D
MAX
) occurs when the converter has the
minimum input voltage:
D
MAX
=
V
OUT
− V
IN(MIN)
V
OUT
Discontinuous conduction mode (DCM) provides higher
conversion ratios at a given frequency at the cost of reduced
efficiencies and higher switching currents.
Figure 5. The RC Filter on SENSE Pin
C
FLT
3757 F05
LT3757
R
FLT
R
SENSE
M1
SENSE
GATE
GND
LT3757/LT3757A
15
3757afd
applicaTions inForMaTion
Boost Converter: Inductor and Sense Resistor Selection
For the boost topology, the maximum average inductor
current is:
I
L(MAX)
=I
O(MAX)
•
1
1− D
MAX
Then, the ripple current can be calculated by:
∆I
L
= c • I
L(MAX)
= c • I
O(MAX)
•
1
1− D
MAX
The constant
c
in the preceding equation represents the
percentage peak-to-peak ripple current in the inductor,
relative to I
L(MAX)
.
The inductor ripple current has a direct effect on the choice
of the inductor value. Choosing smaller values of ∆I
L
requires large inductances and reduces the current loop
gain (the converter will approach voltage mode). Accepting
larger values of ∆I
L
provides fast transient response and
allows the use of low inductances, but results in higher input
current ripple and greater core losses. It is recommended
that
c
fall within the range of 0.2 to 0.6.
Given an operating input voltage range, and having chosen
the operating frequency and ripple current in the inductor,
the inductor value of the boost converter can be determined
using the following equation:
L =
V
IN(MIN)
∆I
L
• f
• D
MAX
The peak and RMS inductor current are:
I
L(PEAK)
=I
L(MAX)
• 1+
c
2
I
L(RMS)
=I
L(MAX)
• 1+
c
2
12
Based on these equations, the user should choose the
inductors having sufficient saturation and RMS current
ratings.
Set the sense voltage at I
L(PEAK)
to be the minimum of the
SENSE current limit threshold with a 20% margin. The
sense resistor value can then be calculated to be:
R
SENSE
=
80mV
I
L(PEAK)
Boost Converter: Power MOSFET Selection
Important parameters for the power MOSFET include the
drain-source voltage rating (V
DS
), the threshold voltage
(V
GS(TH)
), the on-resistance (R
DS(ON)
), the gate to source
and gate to drain charges (Q
GS
and Q
GD
), the maximum
drain current (I
D(MAX)
) and the MOSFET’s thermal
resistances (R
θJC
and R
θJA
).
The power MOSFET will see full output voltage, plus a
diode forward voltage, and any additional ringing across
its drain-to-source during its off-time. It is recommended
to choose a MOSFET whose B
VDSS
is higher than V
OUT
by
a safety margin (a 10V safety margin is usually sufficient).
The power dissipated by the MOSFET in a boost conver-
ter is:
P
FET
= I
2
L(MAX)
• R
DS(ON)
• D
MAX
+ 2 • V
2
OUT
• I
L(MAX)
• C
RSS
• f /1A
The first term in the preceding equation represents the
conduction losses in the device, and the second term, the
switching loss. C
RSS
is the reverse transfer capacitance,
which is usually specified in the MOSFET characteristics.
For maximum efficiency, R
DS(ON)
and C
RSS
should be
minimized. From a known power dissipated in the power
MOSFET,
its junction temperature can be obtained using
the following equation:
T
J
= T
A
+ P
FET
• θ
JA
= T
A
+ P
FET
• (θ
JC
+ θ
CA
)
T
J
must not exceed the MOSFET maximum junction
temperature rating. It is recommended to measure the
MOSFET temperature in steady state to ensure that absolute
maximum ratings are not exceeded.
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LT3757EMSE#PBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Boost, Fly, SEPIC & Inv Cntr
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