Datasheet
www.rohm.com TSZ02201-0RAR1G200640-1-2
©2013 ROHM Co., Ltd. All rights reserved.
13/17
1.Mar.2013 Rev.001
TSZ2211115001
BA4560Yxxx-M
Application Information
NULL method condition for Test circuit1
VCC, VEE, EK, Vicm Unit: V
Parameter VF S1 S2 S3 VCC VEE EK Vicm calculation
Input Offset Voltage VF1 ON ON OFF 15 -15 0 0 1
Input Offset Current VF2 OFF OFF OFF 15 -15 0 0 2
Input Bias Current
VF3 OFF ON
OFF 15 -15 0 0 3
VF4 ON OFF
Large Signal Voltage Gain
VF5
ON ON ON
15 -15 0 0
4
VF6 15 -15 0 0
Common-mode Rejection Ratio
(Input common-mode Voltage Range)
VF7
ON ON OFF
3 -27 0 0
5
VF8 27 -3 0 0
Power Supply
Rejection Ratio
VF9
ON ON OFF
4 -4 0 0
6
VF10 15 -15 0 0
- Calculation -
1. Input Offset Voltage (Vio)
2. Input Offset Current (Iio)
3. Input Bias Current (Ib)
4. Large Signal Voltage Gain (Av)
5. Common-mode Rejection Ration (CMRR)
6. Power supply rejection ratio (PSRR)
Figure 26. Test circuit1 (one channel only)
[V]
RS / RF + 1
VF1
Vio
[A]
RS) / RF + (1× Ri
VF1-VF2
Iio
[A]
RS) / RF + (1 ×Ri×2
VF3-VF4
Ib
[dB]
VF6-VF5
RF/RS)+(1×ΔEK
Log×20 Av
[dB]
VF7-VF8
RF/RS)+(1×ΔVicm
Log×20 CMRR
[dB]
VF9-VF10
RF/RS)+(1×ΔVcc
Log×20 PSRR
VCC
RF=50kΩ
Ri=10kΩRS=50Ω
RL
SW2
500kΩ
500kΩ
0.1µF
EK
15V
DUT
VEE
50kΩ
Vicm
SW1
Ri=10kΩ
Vo
VF
RS=50Ω
1000pF
0.1µF
-15V
NULL
SW3
Datasheet
www.rohm.com TSZ02201-0RAR1G200640-1-2
©2013 ROHM Co., Ltd. All rights reserved.
14/17
1.Mar.2013 Rev.001
TSZ2211115001
BA4560Yxxx-M
Switch Condition for Test Circuit 2
SW No.
SW
1
SW
2
SW
3
SW
4
SW
5
SW
6
SW
7
SW
8
SW
9
SW
10
SW
11
SW
12
SW
13
SW
14
Supply Current
OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF OFF OFF
Maximum Output Voltage (high)
OFF OFF ON OFF OFF ON OFF OFF ON OFF OFF OFF ON OFF
Maximum Output Voltage (Low)
OFF OFF ON OFF OFF ON OFF OFF OFF OFF OFF OFF ON OFF
Slew Rate
OFF OFF OFF ON OFF OFF OFF ON ON ON OFF OFF OFF OFF
Unity Gain Frequency OFF ON OFF OFF ON ON OFF OFF ON ON ON OFF OFF OFF
Total Harmonic Distortion ON OFF OFF OFF ON OFF ON OFF ON ON ON OFF OFF OFF
Input Referred Noise Voltage ON OFF OFF OFF ON ON OFF OFF OFF OFF ON OFF OFF OFF
Figure 27. Test Circuit 2 (each Op-Amp)
Figure 28. Slew Rate Input Waveform
Figure 29. Test Circuit 3(Channel Separation)
40dB amplifier
40dB amplifier
VCC
VEE
R1
V
R2
R1//R2
OUT1
=0.5Vrms
VIN
VCC
VEE
R1
V
R2
R1//R2
OUT2
OTHER
CH
VH
VL
Input wave
t
Input voltage
VH
VL
Δ
t
ΔV
Output wave
SRΔV/Δt
t
Output voltage
90%
10%
C
OUT2
OUT1100
log20CS
(R1=1k, R2=100k)
Datasheet
www.rohm.com TSZ02201-0RAR1G200640-1-2
©2013 ROHM Co., Ltd. All rights reserved.
15/17
1.Mar.2013 Rev.001
TSZ2211115001
BA4560Yxxx-M
Operational Notes
1) Processing of unused circuit
It is recommended to apply connection (see the Figure 30.) and set the non
inverting input terminal at the potential within input common-mode voltage range
(Vicm), for any unused circuit.
2) Input voltage
Applying (VEE - 0.3) to (VEE + 36)V
(BA4558R)
to the input terminal is possible without causing deterioration of the
electrical characteristics or destruction, irrespective of the supply voltage.
However, this does not ensure normal circuit operation. Please note that the
circuit operates normally only when the input voltage is within the common mode
input voltage range of the electric characteristics.
3) Maximum output voltage
Because the output voltage range becomes narrow as the output current
Increases, design the application with margin by considering changes in
electrical characteristics and temperature characteristics.
4) Short-circuit of output terminal
When output terminal and VCC or VEE terminal are shorted, excessive Output
current may flow under some conditions, and heating may destroy IC. It is
necessary to connect a resistor as shown in Figure 31., thereby protecting
against load shorting.
5) Power supply (split supply / single supply) in used
Op-amp operates when specified voltage is applied between VCC and VEE.
Therefore, the single supply Op-Amp can be used for double supply Op-Amp as well.
6) Power dissipation (Pd)
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating
conditions.
7) Short-circuit between pins and wrong mounting
Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals, GND, or other
components on the circuits, can damage the IC.
8) Use in strong electromagnetic field
Using the ICs in strong electromagnetic field can cause operation malfunction.
9) Radiation
This IC is not designed to be radiation-resistant.
10) IC Handling
When stress is applied to IC because of deflection or bend of board, the characteristics may fluctuate due to piezo
resistance effects.
11) Inspection on set board
During testing, turn on or off the power before mounting or dismounting the board from the test Jig. Do not power up the
board without waiting for the output capacitors to discharge. The capacitors in the low output impedance terminal can
stress the device. Pay attention to the electro static voltages during IC handling, transportation, and storage.
12) Output capacitor
When VCC terminal is shorted to VEE (GND) potential and an electric charge has accumulated on the external capacitor,
connected to output terminal, accumulated charge may be discharged VCC terminal via the parasitic element within the
circuit or terminal protection element. The element in the circuit may be damaged (thermal destruction). When using this IC
for an application circuit where there is oscillation, output capacitor load does not occur, as when using this IC as a
voltage comparator. Set the capacitor connected to output terminal below 0.1μF in order to prevent damage to IC.
application circuit for unused op-amp
Figure 30. The example of
Figure 31. The example of
output short protection
Connect
to Vicm
VCC
VEE
Vicm
-
+
VEE
VCC
+
-
protection
resistor

BA4560YF-MGE2

Mfr. #:
Manufacturer:
Description:
Operational Amplifiers - Op Amps Dual Sply Vltge 2Ch SOP8 4-15V
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New from this manufacturer.
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