QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 948
MOSFET-CONTROLLED POWER SUPPLY TRACKER
2
OPERATING PRINCIPLES
The “master” rail is controlled like a typical hot swap cir-
cuit, where the “master” gate voltage slew rate defines
the output slew rate. With the 10uA gate driver current
capability, 0.1uF gate capacitor CMGATE placed on the
board, and negligible MOSFET gate capacitance (1.5nF)
the “master” slew rate is 100V/s.
For managing each “slave” rail the LTC2926 Tracker con-
tains individual tracking and gate controller cells.
The tracking cell servos the TRACK pin to 0.8V by pro-
viding the required current into the Track resistor to keep
the voltage on the TRACK pin equal to 0.8V. The current
supplied by the TRACK pin is mirrored to the feedback FB
pin. The TRACK pin node is connected to the RAMPBUF
pin and GND with external resistors RTB and RTA respec-
tively.
The gate controller cell servos the FB pin to 0.8V by driv-
ing the gate of the external N-channel power MOSFET.
This establishes the “slave” output voltage based on the
TRACK pin current and the feedback divider resistors.
This cell is a bang-bang control system with the inner
command (reference) signal equal to 0.8V and feedback
provided from the feedback pin node, which is connected
to two resistors: RFA to GND and RFB to the “slave” rail
output. When the “slave” output reaches its nominal out-
put, the feedback divider should provide the FB pin with a
voltage a little bit lower than the inner command. In this
case, the gate controller cell develops maximum gate
voltage to enhance the external MOSFET.
Figure 1, borrowed from the Data Sheet, demonstrates
the structure of the tracking and gate controller cells and
simplifies understanding their interaction.
The “slave” output voltage slew rate is defined as:
S
SLAVE
=S
MASTER
• RFB/RTB.
The relation RFB/RTB for initially installed components
for both channels equals 1.5.
The master signal ramps up and the slave supplies track
the master signal, when the ON pin signal rises above
1.23V.
The board allows two options for V
CC
source selection.
Jumper JP1 ON position connects the master supply to
V
CC
node, and the OFF position allows the use of an ex-
ternal voltage source.
There are also two options for the RAMP pin signal
source. Jumper JP2 placed in the MASTER position con-
nects master rail output voltage to the RAMP pin.
Jumper JP2 EXTERNAL position allows the use of an
external source.
After master and slave gate drivers reach their maximum
voltages, the LTC2926 closes integrated remote sense
switches and pulls up the external FET gate with a 10uA
current source as an external remote switch control sig-
nal.
For the proper LTC2926 operation, each “slave” rail out-
put should be loaded to consume a current, which ex-
ceeds 50-100 times the steady state individual feedback
divider current. Initially populated DC948A requires a
100-150 Ohm resistive load or 150-200uF capacitive
load.
Refer to the LTC2926 data sheet for detailed equations
and design examples.
