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T835T-8G-TR

P1-P3P4-P6P7-P9P10-P11
1.2 Characteristics (curves)
Figure 1. Maximum power dissipation versus on-state
RMS current
0
2
4
6
8
10
12
0 1 2 3 4 5 6 7 8
P(W)
I
T(RMS)
(A)
α = 180°
180°
Figure 2. On-state RMS current versus case temperature
0
1
2
3
4
5
6
7
8
9
0 25 50 75 100 125 150
I
T(RMS)
(A)
T
c
(°C)
α = 180°
Figure 3. On-state RMS current versus ambient
temperature (free air convection)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0 25 50 75 100 125 150
I
T(RMS)
(A)
T
a
(°C)
α = 180°
Figure 4. Relative variation of thermal impedance versus
pulse duration
1.0E-01
1.0E+00
1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
K = [Z
th
/R
th
]
t
p
(s)
Z
th(j-c)
Figure 5. Relative variation of gate trigger voltage and
current versus junction temperature (typical values)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-50 -25 0 25 50 75 100 125 150
I
GT
,V
GT
[T
j
] / I
GT
,V
GT
[T
j
= 25 °C]
T
j
(°C)
I
GT
Q3
V
GT
Q1-Q2-Q3
I
GT
Q1-Q2
Figure 6. Relative variation of holding current and
latching current versus junction temperature (typical
values)
0.0
0.5
1.0
1.5
2.0
-50 -25 0 25 50 75 100 125 150
I
H
,I
L
[T
j
] / I
H
,I
L
[T
j
= 25 °C]
T
j
(°C)
I
H
I
L
T835T-8G
Characteristics (curves)
DS12531 - Rev 3
page 4/11
Figure 7. Surge peak on-state current versus number of
cycles
0
10
20
30
40
50
60
70
1 10 100 1000
I
TSM
(A)
Number of cycles
Repetitive
T
c
= 128°C
Non repetitive
T
j
initial = 25 °C
t=20ms
One cy cle
Figure 8. Non repetitive surge peak on-state current for a
sinusoidal pulse with width tp < 10 ms
10
100
1000
0.01 0.10 1.00 10.00
I
TSM
(A)
t (ms)
p
T initial=25°C
j
I
TSM
dI/dt limitation:
100A/µs
Figure 9. On-state characteristics (maximum values)
1
10
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
I
TM
(A)
V
TM
(V)
T
j
max.
V
to
= 0.87 V
R
d
= 80 mΩ
T
j
= 150 °C
T
j
= 25 °C
Figure 10. Relative variation of critical rate of decrease of
main current versus junction temperature
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
25 50 75 100 125 150
(dl/dt)c [T
j
] / (dl/dt)c [T
j = 150 °C
]
T
j
(°C)
Figure 11. Relative variation of static dV/dt immunity
versus junction temperature
0
1
2
3
4
5
6
25 50 75 100 125 150
dV/dt [T
j
] / dV/dt [T
j = 150 °C
]
T
j
(°C)
V
D
= V
R
= 402 V
Figure 12. Relative variation of leakage current versus
junction temperature for different values of blocking
voltage
1.0E-03
1.0E-02
1.0E-01
1.0E+00
25 50 75 100 125 150
I
DRM
/I
RRM
[T
j,
V
DRM
/V
RRM
] / I
DRM
/I
RRM
[T
j max.,
V
DRM
/V
RRM
]*
T
j
(°C)
V
DRM
= V
RRM
= 800 V
V
DRM
= V
RRM
= 600 V
*[T
j
max = 125 °C; V
DRM
, V
RRM
= 800 V]
[T
j
max = 150 °C; V
DRM
, V
RRM
= 600 V]
T835T-8G
Characteristics (curves)
DS12531 - Rev 3
page 5/11
2 Ordering information
Figure 13. Ordering information scheme
T 8 35 T - 8 G TR
SnubberlessTM TRIAC
T = Triac
Current (RMS) / Type
8 = 8 A
Gate Current
35 = 35 mA
Package
G = D²PAK
Specific application
T = increased (dl/dt) and dV/dt producing reduced I
TSM
Voltage
8 = 800 V
Packing
Blank = Tube
TR = Tape and reel
Table 5. Ordering information
Order code Marking Package Weight Base qty. Delivery mode
T835T-8G-TR
T835T-8G D²PAK 1.38 g
1000 Tape and reel
T835T-8G 50 Tube
T835T-8G
Ordering information
DS12531 - Rev 3
page 6/11
P1-P3P4-P6P7-P9P10-P11

T835T-8G-TR

Mfr. #:
Buy T835T-8G-TR
Manufacturer:
STMicroelectronics
Description:
Triacs 8A 800V D2PAK Snubberless Triac
Lifecycle:
New from this manufacturer.
Delivery:
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