5
HFBR-2506AM Receiver
The HFBR-2506AM receiver is housed in a metal-coated,
plastic package, consists of a silicon PIN photodiode
and digitizing IC to produce a logic compatible output.
The IC includes a unique circuit to correct the pulse
width distortion of the first bit after a long idle period.
This enables operation from DC to 16MBd with low
PWD for arbitrary data patterns.
The receiver is a "push-pull" stage compatible with TTL
and CMOS logic. The HFBR-2506AM is compatible with
SMA connectors.
Figure 6.
Parameter Symbol Min Max Unit Notes
Storage and Operating Temperature T
S
,
O
-40 +85 °C
Supply Voltage V
CC
-0.5 5.5 V
Average Output Current I
O
,
AVG
16 mA
Output Power Dissipation P
OD
80 mW
Lead Soldering Cycle
Te m p
Time
T
SOL
T
SOL
260
10
°C
s
1
Parameter Symbol Min Typ
1
Max Unit Condition Notes
Peak Input Power Level Logic HIGH P
RH
-42
-44
dBm 1 mm POF
200 µm HCS
Peak Input Power Level Logic LOW P
RL
-20
-22
-2
-10
dBm 1 mm POF
200 µm HCS
|PWD| < 19 ns
2
Supply Current I
CC
27 45 mA V
O
= Open
High Level Output Voltage V
OH
4.2 4.7 V I
O
= 40 µA
Low Level Output Voltage V
OH
0.22 0.4 V I
O
= 1.6 mA
Pulse Width Distortion PWD -19 19 ns
Propagation Delay Time T
P_HL
or
_LH
150 ns
PIN FUNCTION
1
4
5
6
7
8
CONNECTED TO PIN 4
CONNECTED TO PIN 1
NO CONNECT
VCC
GND
VO
5
6
7
8
4
1
BOTTOM VIEW,
HFBR-2506AM
SEE NOTE 4
Notes:
1. Typical data are at +25 °C, V
CC
= 5.0 V
2. BER <= 10E-9, includes a 10.8 dB margin below the receiver switching threshold level (signal to noise ratio =12)
3. Pins 1 and 4 are for mounting and retaining purposes, but are electrically connected, pins 5 and 6 are electrically isolated. It is recommended
that pins 1, 4, 5 and 6 all be connected to ground to reduce coupling of elecrical noise
Notes:
1. 1.6 mm below seating plane.
Absolute Maximum Ratings
Electrical Characteristics Table
0 °C to +70 °C, 4.75 V < V
CC
< 5.25 V, V
P-P
Noise < = 100 mV unless otherwise noted.
