74AHC_AHCT595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 4 July 2012 10 of 22
NXP Semiconductors
74AHC595; 74AHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
f
max
maximum
frequency
SHCP or STCP;
see Figure 8 and 9
V
CC
= 3.0 V to 3.6 V 80 125 - 60 - 40 - MHz
V
CC
= 4.5 V to 5.5 V 130 170 - 110 - 90 - MHz
t
W
pulse width SHCP HIGH or LOW;
see Figure 8
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
STCP HIGH or LOW;
see Figure 9
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
MR
LOW; see Figure 11
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
t
su
set-up time DS to SHCP; see Figure 9
V
CC
= 3.0 V to 3.6 V 3.5 - - 3.5 - 3.5 - ns
V
CC
= 4.5 V to 5.5 V 3.0 - - 3.0 - 3.0 - ns
SHCP to STCP;
see Figure 10
V
CC
= 3.0 V to 3.6 V 8.5 - - 8.5 - 8.5 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
t
h
hold time DS to SHCP; see Figure 10
V
CC
= 3.0 V to 3.6 V 1.5 - - 1.5 - 1.5 - ns
V
CC
= 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - ns
t
rec
recovery
time
MR to SHCP; see Figure 11
V
CC
= 3.0 V to 3.6 V 3.0 - - 3.0 - 3.0 - ns
V
CC
= 4.5 V to 5.5 V 2.5 - - 2.5 - 2.5 - ns
C
PD
power
dissipation
capacitance
f
i
= 1 MHz; V
I
=GNDtoV
CC
[6]
[7]
-180- - - - - pF
74AHCT595; V
CC
= 4.5 V to 5.5 V
t
pd
propagation
delay
SHCP to Q7S; see Figure 8
[2]
C
L
= 15 pF - 3.8 8.2 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 5.2 10.0 1.0 11.0 1.0 12.0 ns
STCP to Qn; see Figure 9
[2]
C
L
= 15 pF - 4.0 7.4 1.0 8.5 1.0 9.5 ns
C
L
= 50 pF - 5.3 9.0 1.0 10.5 1.0 11.5 ns
MR
to Q7S; see Figure 11
[3]
C
L
= 15 pF - 4.6 8.2 1.0 9.5 1.0 10.5 ns
C
L
= 50 pF - 5.8 10.5 1.0 11.5 1.0 12.5 ns
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max