6.42
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
15
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 3.3V±5%)
Figure 2. Lumped Capacitive Load, Typical Derating
AC Test Conditions
(VDDQ = 2.5V)
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(1)
(VDD = 3.3V±5%)
Figure 1. AC Test Load
AC Test Loads
NOTE:
1. The LBO pin will be internally pulled to VDD if it is not actively driven in the application.
NOTES:
1. All values are maximum guaranteed values.
2. At f = fMAX, inputs are cycling at the maximum frequency of read cycles of 1/tCYC; f=0 means no input lines are changing.
3. For I/Os VHD = VDDQ – 0.2V, VLD = 0.2V. For other inputs VHD = VDD – 0.2V, VLD = 0.2V.
V
DDQ
/2
50Ω
I/O
Z
0
=50Ω
4875 drw 04
,
1
2
3
4
20 30 50 100 200
∆tCD
(Typical, ns)
Capacitance (pF)
80
5
6
4875 drw 05
,
|I
LI
| Input Leakage Current V
DD
= Max., V
IN
= 0V to V
DD
___
5µA
|I
LI
|
LBO Input Leakage Current
(1)
V
DD
= Max., V
IN
= 0V to V
DD
___
30 µA
|I
LO
| Output Leakage Current V
OUT
= 0V to V
DDQ
, Device Deselected
___
5µA
V
OL
Output Low Voltage I
OL
= +6mA, V
DD
= Min.
___
0.4 V
V
OH
Output High Voltage I
OH
= -6mA, V
DD
= Min. 2.0
___
V
4875 tbl 21
Symbol Parameter Test Conditions
200MHz 166MHz 133MHz 100MHz
Unit
Com'l Only Com'l Ind Com'l Ind Com'l Ind
I
DD
Operating Power
Supply Current
Device Selected, Outputs Open,
ADV/LD = X, V
DD
= Max.,
V
IN
> V
IH
or < V
IL
, f = f
MAX
400 350 360 300 310 250 260 mA
I
SB1
CMOS Standby
Power Supply Current
Device Deselected, Outputs
Open, V
DD
= Max., V
IN
> V
HD
or
<
V
LD
, f = 0
40 40 45 40 45 40 45 mA
I
SB2
Clock Running Power
Supply Current
Device Deselected, Outputs
Open, V
DD
= Max., V
IN
> V
HD
or
< V
LD
,
f = f
MAX
130 120 130 110 120 100 110 mA
I
SB3
Idle Power
Supply Current
Device Selected, Outputs Open,
CEN
>
V
IH
, V
DD
= Max.,
V
IN
> V
HD
or < V
LD
, f = f
MAX
40 40 45 40 45 40 45 mA
4875 tbl 22
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
0 to 2.5V
2ns
(V
DDQ
/2)
(V
DDQ
/2)
See Figure 1
4875 tbl 23