Philips Semiconductors
PHD16N03T
TrenchMOS™ standard level FET
Product data Rev. 01 — 18 August 2003 2 of 12
9397 750 11672
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage (DC) 25 °C ≤ T
j
≤ 175 °C - 30 V
V
DGR
drain-gate voltage (DC) 25 °C ≤ T
j
≤ 175 °C; R
GS
=20kΩ -30V
V
GS
gate-source voltage (DC) - ±20 V
V
GSM
peak gate-source voltage t
p
≤ 50 µs; pulsed; duty cycle = 25% - ±30 V
I
D
drain current (DC) T
mb
=25°C; V
GS
=10V;Figure 2 and 3 - 13.1 A
T
mb
= 100 °C; V
GS
=10V;Figure 2 - 9.2 A
I
DM
peak drain current T
mb
=25°C; pulsed; t
p
≤ 10 µs; Figure 3 - 52.4 A
P
tot
total power dissipation T
mb
=25°C; Figure 1 - 32.6 W
T
stg
storage temperature −55 +175 °C
T
j
junction temperature −55 +175 °C
Source-drain diode
I
S
source (diode forward) current (DC) T
mb
=25°C - 13.1 A
I
SM
peak source (diode forward) current T
mb
=25°C; pulsed; t
p
≤ 10 µs - 52.4 A