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USB2532-1080AEN

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
2014 Microchip Technology Inc. DS00001701A-page 31
In this operation, following the 7-bit slave address, the 8-bit register address is written indicating the
start address for the subsequent sequential read operation. In the read sequence, every data access
is a data read from a data register where the register address increments after each access. The write
sequence can end with optional Stop (P). If so, the read sequence must begin with a Start (S).
Otherwise, the read sequence must start with a Repeated Start (Sr).
Figure 7.2 shows the format of the read operation. Where color is visible in the figure, blue and gold
indicate signaling from the I
2
C master, and gray indicates signaling from the slave.
7.1.2 Pull-Up Resistors for I
2
C
The circuit board designer is required to place external pull-up resistors (10 kΩ recommended) on the
SDA & SCL signals (per SMBus 1.0 Specification) to Vcc in order to assure proper operation.
7.2 SMBus Slave Interface
The USB2532 includes an integrated SMBus slave interface, which can be used to access internal
device run time registers or program the internal OTP memory. SMBus detection is accomplished by
detection of pull-up resistors (10 K
Ω recommended) on both the SMBDATA and SMBCLK signals. To
disable the SMBus, a pull-down resistor of 10 K
Ω must be applied to SMBDATA. The SMBus interface
can be used to configure the device as detailed in Section 6.1, "Configuration Method Selection," on
page 25.
Note: All device configuration must be performed via the Pro-Touch Programming Tool. For additional
information on the Pro-Touch programming tool, contact your local Microchip sales
representative.
Figure 7.2 I
2
C Sequential Access Read Format
S 7-Bit Slave Address 1 n n n n n n n n PACK ACK
Register value
for xxxxxxxx
n n n n n n n n ACK
Register value
for xxxxxxxx + 1
... n n n n n n n n NACK
If previous write setting up
Register address ended with a
Stop (P), otherwise it will be
Repeated Start (Sr)
Register value
for xxxxxxxx + y
S 7-Bit Slave Address 0 PA xxxxxxxx A
Register
Address
(bits 7-0)
Optional. If present, Next
access must have Start(S),
otherwise Repeat Start (Sr)
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
DS00001701A-page 32
2014 Microchip Technology Inc.
Chapter 8 Functional Descriptions
This chapter provides additional functional descriptions of key device features.
8.1 Battery Charger Detection & Charging
The USB2532 supports both upstream battery charger detection and downstream battery charging.
The integrated battery charger detection circuitry supports the USB-IF Battery Charging (BC1.2)
detection method and most Apple devices. These circuits are used to detect the attachment and type
of a USB charger and provide an interrupt output to indicate charger information is available to be read
from the device’s status registers via the serial interface. The USB2532 provides the battery charging
handshake and supports the following USB-IF BC1.2 charging profiles:
DCP: Dedicated Charging Port (Power brick with no data)
CDP: Charging Downstream Port (1.5A with data)
SDP: Standard Downstream Port (0.5A with data)
Custom profiles loaded via SMBus or OTP
The following sub-sections detail the upstream battery charger detection and downstream battery
charging features.
8.1.1 Upstream Battery Charger Detection
Battery charger detection is available on the upstream facing port. The detection sequence is intended
to identify chargers which conform to the Chinese battery charger specification, chargers which
conform to the USB-IF Battery Charger Specification 1.2, and most Apple devices.
In order to detect the charger, the device applies and monitors voltages on the upstream DP and DM
pins. If a voltage within the specified range is detected, the device will be updated to reflect the proper
status.
The device includes the circuitry required to implement battery charging detection using the Battery
Charging Specification. When enabled, the device will automatically perform charger detection upon
entering the Hub.ChgDet stage in Hub Mode. The device includes a state machine to provide the
detection of the USB chargers listed in the table below.
Table 8.1 Chargers Compatible with Upstream Detection
USB ATTACH TYPE DP/DM PROFILE CHARGERTYPE
DCP (Dedicated Charging Port) Shorted < 200ohm 001
CDP (Charging Downstream Port) VDP reflected to VDM 010
(EnhancedChrgDet = 1)
SDP
(Standard Downstream Port)
USB Host or downstream hub port
15Kohm pull-down on DP and DM 011
Apple Low Current Charger Apple 100
Apple High Current Charger Apple 101
Apple Super High Current Charger DP=2.7V
DM=2.0V
110
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
2014 Microchip Technology Inc. DS00001701A-page 33
If a custom charger detection algorithm is desired, the SMBus registers can also be used to control
the charger detection block to implement a custom charger detection algorithm. In order to avoid
negative interactions with automatic battery charger detection or normal hub operation, the user should
only attempt Custom battery charger detection during the Hub.Config stage or Hub.Connect stage. No
logic is implemented to disable custom detection at other times - it is up to the user software to observe
this restriction.
There is a possibility that the system is not running the reference clock when battery charger detection
is required (for example if the battery is dead or missing). During the Hub.WaitRefClk stage the battery
charger detection sequence can be configured to be followed regardless of the activity of REFCLK by
relying on the operation of the internal oscillator.
8.1.2 Downstream Battery Charging
The device can be configured by an OEM to have any of the downstream ports to support battery
charging. The Hub's role in battery charging is to provide an acknowledge to a device's query as to if
the hub system supports USB battery charging. The hub silicon does not provide any current or power
FETs or any additional circuitry to actually charge the device. Those components must be provided as
externally by the OEM.
If the OEM provides an external supply capable of supplying current per the battery charging
specification, the hub can be configured to indicate the presence of such a supply to the device. This
indication, via the PRTPWR[1:4] output pins, is on a per/port basis. For example, the OEM can
configure two ports to support battery charging through high current power FET's and leave the other
two ports as standard USB ports.
8.1.2.1 Downstream Battery Charging Modes
In the terminology of the USB Battery Charging Specification, if a port is configured to support battery
charging, the downstream port is a considered a CDP (Charging Downstream Port) if connected to a
Apple Charger Low Current Charger (500mA) DP=2.0V
DM=2.0V
100
Apple Charger High Current Charger (1000mA) DP=2.0V
DM=2.7V
101
Figure 8.1 Battery Charging External Power Supply
Table 8.1 Chargers Compatible with Upstream Detection (continued)
USB ATTACH TYPE DP/DM PROFILE CHARGERTYPE
SOC
VBUS[n]
PRTPWR[n]
INT
SCL
SDA
Microchip
Hub
DC Power
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50

USB2532-1080AEN

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Manufacturer:
Microchip Technology
Description:
USB Interface IC 2-pt USB2.0 Hub Cntlr
Lifecycle:
New from this manufacturer.
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