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74LVT573BQ,115

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 12 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
Fig 14. Package outline SOT360-1 (TSSOP20)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.5
0.2
8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT360-1 MO-153
99-12-27
03-02-19
w M
b
p
D
Z
e
0.25
110
20
11
pin 1 index
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M
A
X
A
y
0 2.5 5 mm
scale
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
A
max.
1.1
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 13 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
Fig 15. Package outline SOT764-1 (DHVQFN20)
terminal 1
index area
0.51
A
1
E
h
b
UNIT
ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
4.6
4.4
D
h
3.15
2.85
y
1
2.6
2.4
1.15
0.85
e
1
3.5
0.30
0.18
0.05
0.00
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT764-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT764-1
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
29
19
12
11
10
1
20
X
D
E
C
B
A
terminal 1
index area
AC
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
02-10-17
03-01-27
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 14 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
BiCMOS Bipolar Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVT573 v.8 20111122 Product data sheet - 74LVT573 v.7
Modifications:
• Legal pages updated.
74LVT573 v.7 20110912 Product data sheet - 74LVT573 v.6
74LVT573 v.6 20110727 Product data sheet - 74LVT573 v.5
74LVT573 v.5 20110629 Product data sheet - 74LVT573 v.4
74LVT573 v.4 20080915 Product data sheet - 74LVT573 v.3
74LVT573 v.3 20011217 Product data sheet - 74LVT573 v.2
74LVT573 v.2 19980219 Product specification - -
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

74LVT573BQ,115

Mfr. #:
Buy 74LVT573BQ,115
Manufacturer:
Nexperia
Description:
Latches 3.3V OCTAL D TRANS
Lifecycle:
New from this manufacturer.
Delivery:
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