9
Low Power Standby
Overview
The low power standby mode (LPS, 000) should be used
during idle line conditions. The device is designed to operate
from the high battery during this mode. Most of the internal
circuitry is powered down, resulting in low power dissipation.
If the 2-wire (tip/ring) DC voltage requirements are not
critical during idle line conditions, the device may be
operated from the low battery. Operation from the low
battery will decrease the standby power dissipation.
2-Wire Interface
During LPS, the 2-wire interface is maintained with internal
switches and voltage references. The Tip and Ring
amplifiers are turned off to conserve power. The device will
provide MTU compliance, loop current and loop supervision.
Figure 2 represents the internal circuitry providing the 2-wire
interface during low power standby.
MTU Compliance
Maintenance Termination Unit or MTU compliance places
DC voltage requirements on the 2-wire terminals during idle
line conditions. The minimum idle voltage is 42.75V. The
high side of the MTU range is 56V. The voltage is expressed
as the difference between Tip and Ring.
The Tip voltage is held near ground through a 600Ω resistor
and switch. The Ring voltage is limited to a maximum of
-49V (by MTU REF) when operating from either the high or
low battery. A switch and 600Ω resistor connect the MTU
reference to the Ring terminal. When the high battery
voltage exceeds the MTU reference of -49V (typically), the
Ring terminal will be clamped by the internal reference. The
same Ring relationships apply when operating from the low
battery voltage. For high battery voltages (VBH) less than or
equal to the internal MTU reference threshold:
Loop Current
During LPS, the device will provide current to a load. The
current path is through resistors and switches, and will be
function of the off hook loop resistance (R
LOOP
). This
includes the off hook phone resistance and copper loop
resistance. The current available during LPS is determined
by Equation 13.
Internal current limiting of the standby switches will limit the
maximum current to 20mA.
Another loop current related parameter is longitudinal
current capability. The longitudinal current capability is
reduced to 10mA
RMS
per pin. The reduction in longitudinal
current capability is a result of turning off the Tip and Ring
amplifiers.
On Hook Power Dissipation
The on hook power dissipation of the device during LPS is
determined by the operating voltages and quiescent currents
and is calculated using Equation 14.
The quiescent current terms are specified in the electrical
tables for each operating mode. Load power dissipation is
not a factor since this is an on hook mode. Some
applications may specify a standby current. The standby
current may be a charging current required for modern
telephone electronics.
Standby Current Power Dissipation
Any standby line current, I
SLC
, introduces an additional
power dissipation term P
SLC
. Equation 15 illustrates the
power contribution is zero when the standby line current is
zero.
If the battery voltage is less than -49V (the MTU clamp is
off), the standby line current power contribution reduces to
Equation 16.
Most applications do not specify charging current
requirements during standby. When specified, the typical
charging current may be as high as 5mA.
TABLE 1. DEVICE INTERFACES DURING LPS
INTERFACE ON OFF NOTES
Receive x AC transmission, impedance
matching and ringing are
disabled during this mode.
Ringing x
Transmit x
2-Wire x Amplifiers disabled.
Loop Detect x Switch hook or ground key.
FIGURE 2. LPS 2-WIRE INTERFACE CIRCUIT DIAGRAM
TIP AMP
RING AMP
TIP
RING
MTU REF
GND
600Ω
600Ω
V
RING
V
BH
4+=
(EQ. 12)
I
LOOP
1– 49–()–()600 600 R
LOOP
++()⁄=
(EQ. 13)
P
LPS
V
BH
I
BHQ
× V
BL
I
BLQ
× V
CC
I
CCQ
×++=
(EQ. 14)
P
SLC
I
SLC
V
BH
49– 1I
SLC
x1200++()×=
(EQ. 15)
P
SLC
I
SLC
V
BH
1I
SLC
x1200++()×=
(EQ. 16)
HC55183, HC55184
