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74F280SJ

P1-P3P4-P6
© 2000 Fairchild Semiconductor Corporation DS009512 www.fairchildsemi.com
April 1988
Revised September 2000
74F280 9-Bit Parity Generator/Checker
74F280
9-Bit Parity Generator/Checker
General Description
The F280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even
number of inputs is HIGH, the Sum Even output is HIGH. If
an odd number is HIGH, the Sum Even output is LOW. The
Sum Odd output is the complement of the Sum Even out-
put.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F280PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
74F280
Unit Loading/Fan Out
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
I
0
–I
8
Data Inputs 1.0/1.0 20 µA/−0.6 mA
∑
O
Odd Parity Output 50/33.3 −1 mA/20 mA
∑
E
Even Parity Output 50/33.3 −1 mA/20 mA
Number of Outputs
HIGH Inputs
∑ Even ∑ Odd
I
0
–I
8
0, 2, 4, 6, 8 H L
1, 3, 5, 7, 9 L H
3 www.fairchildsemi.com
74F280
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
AC Electrical Characteristics
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Junction Temperature under Bias
−55°C to +150°C
V
CC
Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output
−0.5V to V
CC
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambient Temperature 0
°C to +70°C
Supply Voltage
+4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min I
IN
= −18 mA
V
OH
Output HIGH 10% V
CC
2.5 V Min I
OH
= −1 mA
Voltage 5% V
CC
2.7 I
OH
= −1 mA
V
OL
Output LOW Voltage 10% V
CC
0.5 V Min I
OL
= 20 mA
I
IH
Input HIGH
5.0 µAMaxV
IN
= 2.7V
Current
I
BVI
Input HIGH Current
7.0 µAMaxV
IN
= 7.0V
Breakdown Test
I
CEX
Output HIGH
50 µAMaxV
OUT
= V
CC
Leakage Current
V
ID
Input Leakage
4.75 V 0.0
I
ID
= 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current −0.6 mA Max V
IN
= 0.5V
I
OS
Output Short-Circuit Current −60 −150 mA Max V
OUT
= 0V
I
CCH
Power Supply Current 25 38 mA Max V
O
= HIGH
Symbol Parameter
T
A
= +25°CT
A
= −55°C to +125°CT
A
= 0°C to +70°C
Units
V
CC
= +5.0V V
CC
= 5.0V V
CC
= 5.0V
C
L
= 50 pF C
L
= 50 pF C
L
= 50 pF
Min Typ Max Min Max Min Max
t
PLH
Propagation Delay 6.5 10.0 15.0 6.5 20.0 6.5 16.0
ns
t
PHL
I
n
to ∑
E
6.5 11.0 16.0 6.5 21.0 6.5 17.0
t
PLH
Propagation Delay 6.0 10.0 15.0 5.0 20.0 6.0 16.0
ns
t
PHL
I
n
to ∑
O
6.5 11.0 16.0 6.5 21.0 6.5 17.0
P1-P3P4-P6

74F280SJ

Mfr. #:
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Manufacturer:
ON Semiconductor / Fairchild
Description:
Parity Functions 9-Bit Par Gen/Check
Lifecycle:
New from this manufacturer.
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