LT1011CS8#TRPBF Datasheet LT1011AIS8#PBF, LT1011IS8#PBF, LT1011CS8#PBF | P7-P9

LT1011/LT1011A

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COMMON MODE VOLTAGE (V)

–

INPUT OFFSET VOLTAGE (mV)

0.5

1.5

2.5

1011 G19

–0.5

–1.5

1.0

2.0

–1.0

–2.0

–2.5

0.1 0.2 0.3 0.4 0.5 0.6 0.7

= 25°C

UPPER

COMMON MODE

LIMIT = V

– (1.5V)

–

(OR GND WITH

SINGLE SUPPLY)

TEMPERATURE (°C)

–50 –25

CHANGE IN V

(mV/µA)

0.2

0.4

75 100 125

150

1011 G20

–150mV

–100mV

–50mV

0.8

0.6

CHANGE IN V

FOR CURRENT

INTO PINS 5 OR 6

VOLTAGE ON PINS 5 AND 6

WITH RESPECT TO V

Typical perForMance characTerisTics

Input Offset Voltage

vs Common Mode Voltage Offset Pin Characteristics

pin FuncTions

GND (PIN 1): Ground.

INPUT

(PIN 2): Non-Inverting Input of Comparator

INPUT

–

(PIN 3): Inverting Input of Comparator

–

(PIN 4): Negative Supply Voltage

OUT (PIN 7): Open-Collector Output of Comparator

BALANCE (PIN 5): Balance Input. This input can be used

to adjust the input voltage offset or to add hysteresis. If

offset balancing or hysteresis is not used, the BALANCE

pins should be connected together with a 0.1µF capacitor.

BALANCE/STROBE (PIN 6): Strobe Input Pin. Using this

pin, the output transistor can be forced to an “off” state,

giving a “hi” output at the collector (Pin 7). This input can

be used to adjust the input voltage offset or used to add

hysteresis. If offset balancing or hysteresis is not used,

the BALANCE pins should be connected together with a

0.1µF capacitor.

(PIN 8): Positive Supply Voltage

LT1011/LT1011A

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applicaTions inForMaTion

Preventing Oscillation Problems

Oscillation problems in comparators are nearly always

caused by stray capacitance between the output and

inputs or between the output and other sensitive pins

on the comparator. This is especially true with high

gain bandwidth comparators like the LT1011, which are

designed for fast switching with millivolt input signals.

The gain bandwidth product of the LT1011 is over 10GHz.

Oscillation problems tend to occur at frequencies around

5MHz, where the LT1011 has a gain of ≈2000. This implies

that attenuation of output signals must be at least 2000:1 at

5MHz as measured at the inputs. If the source impedance

is 1kΩ, the effective stray capacitance between output and

input must have a reactance of more than (2000)(1kΩ) =

2MΩ, or less than 0.02pF. The actual interlead capacitance

between input and output pins on the LT1011 is less than

0.002pF when cut to printed circuit mount length. Additional

stray capacitance due to printed circuit traces must be

minimized by routing the output trace directly away from

input lines and, if possible, running ground traces next

to input traces to provide shielding. Additional steps to

ensure oscillation-free operation are:

1. Bypass the STROBE/BALANCE pins

with

a 0.01µF capaci-

tor connected from Pin 5 to Pin 6. This eliminates stray

capacitive feedback from the output to the BALANCE

pins, which are nearly as sensitive as the inputs.

2. Bypass the negative supply (Pin 4) with a 0.1µF ceramic

capacitor close to the comparator. 0.1µF can also be

used for the positive supply (Pin 8) if the pull-up load

is tied to a separate supply. When the pull-up load is

tied directly to Pin 8, use a 2µF solid tantalum bypass

capacitor.

3. Bypass any slow moving or DC input with a capaci-

tor (≥0.01µF) close to the comparator to reduce high

frequency source impedance.

4. Keep resistive source impedance as low as possible. If

a resistor is added in series with one input to balance

source impedances for DC accuracy, bypass it with a

capacitor. The low input bias current of the LT1011

usually eliminates any need for source resistance bal-

ancing. A 5kΩ imbalance, for instance, will create only

0.25mV DC offset.

5. Use hysteresis. This consists of shifting the input offset

voltage of the comparator when the output changes

state. Hysteresis forces the comparator to move quickly

through its linear region, eliminating oscillations by

“overdriving” the

comparator under all

input conditions.

Hysteresis may be either AC or DC. AC techniques do

not shift the apparent offset voltage of the compara-

tor, but require a minimum input signal slew rate to be

effective. DC hysteresis works for all input slew rates,

but creates a shift in offset voltage dependent on the

previous condition of the input signal. The circuit shown

in Figure 1 is an excellent compromise between AC and

DC hysteresis.

–

LT1011INPUTS

2µF

TANT

–15V

0.003µF

0.1µF

1011 F01

15M

15V

OUTPUT

Figure 1. Comparator with Hysteresis

LT1011/LT1011A

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applicaTions inForMaTion

Figure 2. Input Offset Voltage vs Time to Last Transition

Figure 3. Limiting Fault Input Currents

This circuit is especially useful for general purpose

comparator applications because it does not force

any signals directly back onto the input signal source.

Instead, it takes advantage of the unique properties

of the BALANCE pins to provide extremely fast, clean

output switching even with low frequency input signals

in the millivolt range. The 0.003µF capacitor from Pin

6 to Pin 8 generates AC hysteresis because the voltage

on the BALANCE pins shifts slightly, depending on the

state of the output. Both pins move about 4mV. If one

pin (6) is bypassed, AC hysteresis is created. It is only

a few millivolts referred to the inputs, but is sufficient

to switch the output at nearly the maximum speed of

which the comparator is capable. To prevent problems

from low values of input slew rate, a slight amount of DC

hysteresis is also used. The sensitivity of the BALANCE

pins to current is about 0.5mV input referred offset for

each microampere of BALANCE pin current. The 15M

resistor tied from OUTPUT to Pin 5 generates 0.5mV DC

hysteresis. The combination of AC and DC hysteresis

creates clean oscillation-

free switching

with very small

input errors. Figure 2 plots input referred error versus

switching frequency for the circuit as shown.

Note that at low frequencies, the error is simply the

DC hysteresis, while at high frequencies, an addi-

tional error is created by the AC hysteresis. The high

frequency error can be reduced by reducing C

, but

lower values may not provide clean switching with very

low slew rate input signals.

Input Protection

The inputs to the LT1011 are particularly suited to general

purpose comparator applications because large differential

and/or common mode voltages can be tolerated without

damage to the comparator. Either or both inputs can be

raised 40V above the negative supply, independent of the

positive supply voltage. Internal forward biased diodes

will conduct when the inputs are taken below the negative

supply. In this condition, input current must be limited to

1mA. If very large (fault) input voltages must be accom-

modated, series resistors and clamp diodes should be

used (see Figure 3).

TIME/FREQUENCY (µs)

INPUT OFFSET VOLTAGE (mV)

10 100 1000

1011 F02

–1

–2

C8 TO C6 = 0.003µF

(50kHz) (5kHz)

OUTPUT “HI” TO “LO”

OUTPUT “LO” TO “HI”

–

LT1011

R4*

300Ω

R3*

300Ω

INPUTS

D1 TO D4: 1N4148

MAY BE ELIMINATED FOR I

FAULT

≤ 1mA

SELECT ACCORDING TO ALLOWABLE

FAULT CURRENT AND POWER DISSIPATION

R1**

–

R2**

1011 F03

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

LT1011CS8#TRPBF

Mfr. #:

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Manufacturer:

Analog Devices Inc.

Description:

Analog Comparators Prec Volt Comparator

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LT1011CS8#TRPBF

LT1011CS8#TRPBF

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