PRMH11
50 V, 100 mA NPN/NPN Resistor-Equipped double
Transistors (RET)
14 August 2017 Product data sheet
1. General description
NPN/NPN Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268)
leadless Surface-Mounted Device (SMD) plastic package.
PNP/PNP complement: PRMB11.
NPN/PNP complement: PRMD3.
2. Features and benefits
• 100 mA output current capability
• Built-in bias resistors
• Simplifies circuit design
• Reduces component count
• Reduces pick and place costs
• Low package height of 0.5 mm
• AEC-Q101 qualified
3. Applications
• Digital applications
• Cost-saving alternative to BC847/BC857 series in digital applications
• Control of IC inputs
• Switching loads
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
V
CEO
collector-emitter
voltage
open base - - 50 V
I
O
output current - - 100 mA
h
FE
DC current gain V
CE
= 5 V; I
C
= 5 mA; T
amb
= 25 °C 30 - -
R1 bias resistor 1 [1] 7 10 13 kΩ
R2/R1 bias resistor ratio
T
amb
= 25 °C
[1] 0.8 1 1.2
[1] See section "Test information" for resistor calculation and test conditions.
