LTC5544
13
5544f
applicaTions inForMaTion
Discrete IF Balun Matching
For many applications, it is possible to replace the IF
tran sformer with the discrete IF balun shown in Figure 9.
The values of L5, L6, C13 and C14 are calculated to realize
a 180° phase shift at the desired IF frequency and provide
a 50Ω single-ended output, using the following equations.
Inductor L7 is used to cancel the internal capacitance
C
IF
and supplies bias voltage to the IF pin. C15 is a DC
blocking capacitor.
L5,L6 =
R
IF
R
OUT
ω
IF
C13, C14 =
1
ω
IF
R
IF
R
OUT
L7 =
|X
IF
|
ω
IF
These equations give a good starting point, but it is usually
necessary to adjust the component values after building
and testing the circuit. The final solution can be achieved
with less iteration by considering the parasitics of L7 in
the previous calculation.
The typical performances of the LTC5544 using a discrete
IF balun matching and a transformer-based IF matching
are shown in Figure 10. With an IF frequency of 456MHz,
the actual components values for the discrete balun are:
L5, L6 = 36nH, L7 = 82nH and C13, C14 = 3.3pF
Measured IF output return losses for transformer-based
bandpass IF matching and discrete balun IF matching
(456MHz IF frequency) are plotted in Figure 11. A discrete
balun has less insertion loss than a balun transformer,
but the IF bandwidth of a discrete balun is less than that
of a transformer.
IF Amplifier Bias
The IF amplifier delivers excellent performance with
V
CCIF
= 3.3V, which allows the V
CC
and V
CCIF
supplies
to be common. With V
CCIF
increased to 5V, the RF input
P1dB increases by more than 3dB, at the expense of higher
power consumption. Mixer performance at 5250MHz is
shown in Table 4 with V
CCIF
= 3.3V and 5V.
V
CC
L3
(OR SHORT)
13141516
IF
AMP
BIAS
98mA
4mA
IFGND
LTC5544
IFBIAS IF
IF
+
R1
(OPTION TO
REDUCE
DC POWER)
5544 F09
IF
OUT
V
CCIF
L7
L5
C13
C15
C14
L6
Figure 9. IF Amplifier Schematic with Discrete IF Balun
Figure 10. Conversion Gain and IIP3 vs RF Frequency
RF FREQUENCY (GHz)
4.5
18
G
C
(dB)
26
24
22
20
28
3
11
9
7
5
13
4.7 6.34.9 5.1 5.3 5.5 5.7 5.9 6.1
5544 F10
IIP3
G
C
TC4-1W-17LN+ BALUN
DISCRETE BALUN
IIP3 (dBm)
IF = 456MHz
LOW SIDE LO
Figure 11. IF Output Return Loss
L1, L2 = 150 nH
L1, L2 = 82nH
L1, L2 = 39nH
DISCRETE BALUN 456MHz
IF FREQUENCY (MHz)
100
30
IF PORT RETURN LOSS (dB)
15
10
5
20
25
0
150 200 250 300
5544 F11
350 400 450 500 550 600
Table 4. Performance Comparison with V
CCIF
= 3.3V and 5V
(RF = 5250MHz, Low Side LO, IF = 240MHz)
V
CCIF
(V)
I
CCIF
(mA)
G
C
(dB)
P1dB
(dBm)
IIP3
(dBm)
NF
(dB)
3.3 98 7.4 11.4 25.9 11.3
5.0 101 7.4 14.6 26.5 11.4
LTC5544
14
5544f
applicaTions inForMaTion
The IFBIAS pin (Pin 16) is available for reducing the DC
current consumption of the IF amplifier, at the expense of
reduced performance. This pin should be left open-circuited
for optimum performance. The internal bias circuit pro-
duces a 4mA reference for the IF amplifier, which causes
the amplifier to draw approximately 98mA. If resistor R1
is connected to Pin 16 as shown in Figure 6, a portion of
the reference current can be shunted to ground, resulting
in reduced IF amplifier current. For example, R1 = 1
will shunt away 1.5mA from Pin 16 and the IF amplifier
current will be reduced by 40% to approximately 59mA.
The nominal, open-circuit DC voltage at Pin 16 is 2.1V.
Table 5 lists RF performance at 5250MHz versus IF ampli-
fier current.
Table 5. Mixer Performance with Reduced IF Amplifier Current
(RF = 5250MHz, Low Side LO, IF = 240MHz, V
CC
= V
CCIF
= 3.3V)
R1
(kΩ)
I
CCIF
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
OPEN 98 7.4 25.9 11.4 11.3
4.7 89 7.2 25.7 11.5 11.4
2.2 77 6.9 25.2 11.6 11.5
1.0 59 6.3 23.8 11.3 11.6
(RF = 5250MHz, High Side LO, IF = 240MHz, V
CC
= V
CCIF
= 3.3V)
R1
(kΩ)
I
CCIF
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
OPEN 98 7.3 24.0 11.4 11.7
4.7 89 7.0 23.8 11.4 11.9
2.2 77 6.6 23.5 11.4 12.2
1.0 59 5.8 22.6 11.3 12.4
Shutdown Interface
Figure 12 shows a simplified schematic of the SHDN pin
interface. To disable the chip, the SHDN voltage must be
higher than 3.0V. If the shutdown function is not required,
the SHDN pin should be connected directly to GND. The
voltage at the SHDN pin should never exceed the power
supply voltage (V
CC
) by more than 0.3V. If this should
occur, the supply current could be sourced through the
ESD diode, potentially damaging the IC.
The SHDN pin must be pulled high or low. If left floating,
then the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the SHDN
pin, then a
pull-up or pull-down resistor must be used.
Figure 12. Shutdown Input Circuit
Figure 13. TEMP Diode Voltage vs Junction Temperature (T
J
)
LTC5544
4
SHDN
500Ω
V
CC1
5544 F12
5
Temperature Diode
The LTC5544 provides an on-chip diode at Pin 12 (TEMP)
for chip temperature measurement. Pin 12 is connected to
the anode of an internal ESD diode with its cathode con-
nected to internal ground. The chip temperature can be
measured by injecting a constant DC current into Pin 12
and measuring its DC voltage. The voltage vs temperature
coefficient of the diode is about –1.73mV/°C with 10µA
current injected into the TEMP pin. Figure 13 shows a
typical temperature-voltage behavior when 10µA and 80µA
currents are injected into Pin 12.
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending on
the supply inductance, this could result in a supply volt-
age transient that exceeds the maximum rating. A supply
voltage ramp time of greater than 1ms is recommended.
JUNCTION TEMPERATURE (°C)
–40
TEMP DIODE VOLTAGE (mV)
600
850
900
0
40 80
500
750
550
800
450
400
700
650
–20
20
60
100
5544 F13
80µA
10µA
LTC5544
15
5544f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
4.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.55 ± 0.20
1615
1
2
BOTTOM VIEW—EXPOSED PAD
2.15 ±0.10
(4-SIDES)
0.75 ± 0.05
R = 0.115
TYP
0.30 ± 0.05
0.65 BSC
0.200 REF
0.00 – 0.05
(UF16) QFN 10-04
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.72 ±0.05
0.30 ±0.05
0.65 BSC
2.15 ±0.05
(4 SIDES)
2.90 ± 0.05
4.35 ±0.05
PACKAGE OUTLINE
PIN 1 NOTCH R = 0.20 TYP
OR 0.35 × 45° CHAMFER
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)

LTC5544IUF#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Mixer 4GHz - 6GHz High Dynamic Range Downconverting Mixer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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