LT6210/LT6211
6
62101fc
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: As long as output current and junction temperature are kept
below the absolute maximum ratings, no damage to the part will occur.
Depending on the supply voltage, a heat sink may be required.
Note 3: The LT6210C/LT6211C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 4: The LT6210C/LT6211C is guaranteed to meet specified
performance from 0°C to 70°C. The LT6210C/LT6211C is designed,
characterized and expected to meet specified performance from –40°C and
85°C but is not tested or QA sampled at these temperatures. The LT6210I/
LT6211I is guaranteed to meet specified performance from –40°C to 85°C.
Note 5: The LT6210 with no metal connected to the V
–
pin has a θ
JA
of
230°C/W, however, thermal resistances vary depending upon the amount
of PC board metal attached to Pin 2 of the device. With the LT6210
mounted on a 2500mm
2
3/32" FR-4 board covered with 2oz copper on
both sides and with just 20mm
2
of copper attached to Pin 2, θ
JA
drops to
160°C/W. Thermal performance can be improved even further by using a
4-layer board or by attaching more metal area to Pin 2.
Thermal resistance of the LT6211 in MSOP-10 is specified for a 2500mm
2
3/32" FR-4 board covered with 2oz copper on both sides and with 100mm
2
of copper attached to Pin 5. Its performance can also be increased with
additional copper much like the LT6210.
To achieve the specified θ
JA
of 43°C/W for the LT6211 DFN-10, the
exposed pad must be soldered to the PCB. In this package, θ
JA
will benefit
elecTrical characTerisTics
(I
S
= 300µA per Amplifier) The l denotes the specifications which
apply over the specified operating temperature range, otherwise specifications are at T
A
= 25°C. For V
+
= 5V, V
–
= –5V: R
SET
= 1M to
ground, A
V
= +2, R
F
= R
G
= 11k, R
L
= 1k; For V
+
= 3V, V
–
= 0V: R
SET
= 270k to V
–
, A
V
= +2, R
F
= 9.31k, R
G
= 9.31k to 1.5V, R
L
= 1k to
1.5V unless otherwise specified.
SYMBOL PARAMETER CONDITIONS
V
+
= 5V, V
–
= –5V, I
S
= 300µA V
+
= 3V, V
–
= 0V, I
S
= 300µA
UNITSMIN TYP MAX MIN TYP MAX
CMRR Common Mode Rejection Ratio V
IN
= V
+
– 1.2V to V
–
+ 1.2V
l
46
43
50 46 dB
dB
–I
CMRR
Inverting Input Current
Common Mode Rejection
V
IN
= V
+
– 1.2V to V
–
+ 1.2V
l
0.15 ±1.5
±2
0.2 µA/V
µA/V
PSRR Power Supply Rejection Ratio V
S
= ±1.5V to ±6V (Note 6)
l
60 85 60 85 dB
–I
PSRR
Inverting Input Current Power
Supply Rejection
V
S
= ±1.5V to ±6V (Note 6)
l
0.4 ±2.2
±4
0.4 ±2.2
±4
µA/V
µA/V
I
S
Supply Current per Amplifier
l
0.3 0.525
0.6
0.3 0.38
0.43
mA
mA
I
OUT
Maximum Output Current R
L
= 0Ω (Notes 7, 11)
l
±30 ±10 mA
R
OL
Transimpedance, ∆V
OUT
/∆I
IN
–
V
OUT
= V
+
– 1.2V to V
–
+ 1.2V 300 660 65 120 kΩ
SR Slew Rate (Note 8) 120 170 20 V/µs
t
pd
Propagation Delay 50% V
IN
to 50% V
OUT
,
100mV
P-P
, Larger of t
pd
+
, t
pd
–
30 50 ns
BW –3dB Bandwidth <1dB Peaking, A
V
= 1 10 7.5 MHz
t
s
Settling Time To 0.1% of V
FINAL
, V
STEP
= 2V 200 300 ns
t
f
, t
r
Small-Signal Rise and Fall Time 10% to 90%, V
OUT
= 100mV
P-P
40 50 ns
HD2 2nd Harmonic Distortion f = 1MHz, V
OUT
= 2V
P-P
–40 ––45 dBc
HD3 3rd Harmonic Distortion f = 1MHz, V
OUT
= 2V
P-P
–45 –45 dBc
from increased copper area attached to the exposed pad.
T
J
is calculated from the ambient temperature T
A
and the power
dissipation PD according to the following formula:
T
J
= T
A
+ (P
D
• θ
JA
)
The maximum power dissipation can be calculated by:
P
D(MAX)
= (V
S
• I
S(MAX)
) + (V
S
/2)
2
/R
LOAD
Note 6: For PSRR and –IPSRR testing, the current into the I
SET
pin is
constant, maintaining a consistent LT6210/LT6211 quiescent bias point.
A graph of PSRR vs Frequency is included in the Typical Performance
Characteristics showing +PSRR and –PSRR with R
SET
connecting I
SET
to
ground.
Note 7: While the LT6210 and LT6211 circuitry is capable of significant
output current even beyond the levels specified, sustained short-
circuit current exceeding the Absolute Maximum Rating of ±80mA may
permanently damage the device.
Note 8: This parameter is guaranteed to meet specified performance
through design and characterization. It is not production tested.
Note 9: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R Video
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five
identical amplifier stages were cascaded giving an effective resolution of
0.02% and 0.02°.
Note 10: Input voltage range on ±5V dual supplies is guaranteed by
CMRR. On 3V single supply it is guaranteed by design and by correlation
to the ±5V input voltage range limits.
Note 11: This parameter is tested by forcing a 50mV differential voltage
between the inverting and noninverting inputs.
