MC33567D-3R2G

MC33567
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4
OPERATING DESCRIPTION
Introduction
The MC33567 series is a family of Dual Linear FET
Controllers designed for Power Management applications
where high current, voltage regulation is needed. Some
computer applications include:
1.2 V − Power Supply
1.515 V − AGP (Advanced Graphic Port) and GTL+
(Gunning Transistor Logic − Intel’s electrical bus
technology)
1.818 V − I/O planes on motherboards
2.3 V − Power Supply
2.525 V − Clock and memory
The MC33567 provides tight output voltage regulation,
(V
out
), and incorporates individual SHDN controls for each
FET controller and voltage protection by sensing the output
voltage.
Output:
The MC33567 provides tight output voltage regulation
from one or two supply voltages using 2 external N−Channel
MOSFETs. Each controller operates independently and
regulates the output voltage to a predetermined level (1.2 V,
1.515 V 1.818 V, 2.3 V or 2.525 V). In addition, regulator 2
of the MC33567−1 incorporates a V
in
bypass mode on which
the external FET is fully enhanced.
Shutdown:
The regulated outputs of the MC33567 can be disabled
with the use of the SHDN pin. It also determines the output
voltage level. SHDN
can be controlled externally from
board signals like the AGP or GTL+ as shown in Figure 3.
Figure 3. 1.5 V/3.3 V AGP Card Detection
*V
in
while on bypass mode (MC33567−1 only)
1
2
3
4
8
7
6
5
MC33567
DRV2
SENSE2
3.3 V
AGP
Card Type
Detection
AGP
Card
Voltage
V
out
or V
in
*
12 V (V
CC
)
3.3 V (V
in
)
SHDN2
10 k
Listed below are the SHDN threshold voltage levels and
the corresponding regulator output voltages:
1. If the SHDN pin is left open, the output voltage is set
to its regulated value.
2. If a voltage less than 0.8 V is applied to the SHDN
pin,
the output voltage is set to 0 V.
3. If a voltage greater than 1.3 V and less than 4.1 V is
applied to the SHDN pin, the output voltage is set to its
regulated voltage.
4. If the SHDN
voltage is pulled above 4.1 V, the
MC33567 enters a V
in
bypass mode. In this mode, the
MOSFET is fully enhanced and the output voltage is
the MOSFET drain voltage (V
in
) minus the MOSFET
drain−source on voltage V
DS(on)
. This feature is only
available on REGULATOR 2 of the MC33567−1.
Table 1 summarizes the output voltage options and its
relationship with V
SHDN
.
Table 1. Logic Table for SHDN Pin
Device V
SHDN
(V) V
out
(V)
MC33567−1
REGULATOR 1
No Connect
0.8 V
1.3 V
1.818 V
0 V
1.818 V
REGULATOR 2 No Connect
0.8 V
1.3 V V
SHDN
4.1 V
4.1 V
1.515 V
0 V
1.515 V
V
in
−V
DS(on)
(Bypass
Mode)
MC33567−2
REGULATOR 1 &
REGULATOR 2
No Connect
0.8 V
1.3 V
2.525 V
0 V
2.525 V
MC33567−3
REGULATOR 1
No Connect
0.8 V
1.3 V
2.3 V
0 V
2.3 V
REGULATOR 2 No Connect
0.8 V
1.3 V
1.2 V
0 V
1.2 V
Undervoltage Detection:
If V
out
drops below 75% of the regulated threshold for
greater than 250 µs or a short circuit condition is present, that
output will go into short circuit or Hiccup Mode. While in
Hiccup mode, the output is turned ON for 1.0 ms and OFF
for 40 ms for a duty cycle of 1:41 as shown in Figure 4. This
mode will continue as long as the fault is present. Once the
fault is removed, the regulator will resume normal
operation.
40 ms
1 ms
Figure 4. Hiccup Mode Duty Cycle
MC33567
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Sense:
If the load is located away from the regulator, the voltage
drop on the connecting cable or trace can become
significant. The MC33567 provides tight voltage load
regulation with varying load currents using it’s SENSE
feature. As shown in Figure 5, the MC33567 senses the
voltage at the load and provides feedback to the regulator.
The regulator voltage is then adjusted to compensate for the
load changes. It is recommended that the SENSE connection
be placed as close as possible to the load. Also, use a separate
trace to connect the source of the N−channel MOSFET to the
load to avoid interference or coupling with the SENSE
signal. The use of the SENSE feature is required for correct
device operation. If the SENSE pin is not connected to the
load, the output will go into Hiccup mode.
The current into the SENSE pin is given by the following
equation:
I
SENSE
100 A
V
out
1.8 k
Figure 5. Voltage Regulation Using Sense Feature
SENSE
V
in
R
L
DRV
Feedback
to
Regulator
1.8 k V
OUT
+
100 AI
SENSE
N−Channel MOSFET Selection:
The MC33567 was characterized using
ON Semiconductor’s MTD3055VL N−channel MOSFET.
Other MOSFETs can be used with the MC33567 as long as
power and stability requirements are met.
Power:
A MOSFET with a low drain−source on resistance
(R
DS(on)
) will insure the output voltage is not drastically
reduced due to excessive voltage drop across the MOSFET.
The required R
DS(on)
can be calculated using the equation
below:
R
DS(on)
0.5
V
in
V
out
I
LOAD
where:
V
in
= Input Voltage, typically 3.3 V
V
out
= Regulator Output Voltage
(1.2 V, 1.515 V, 1.818 V, 2.3 V, or 2.525 V)
I
LOAD
= Load Current
A safety margin of 0.5 was added to account for R
DS(on)
variations over the operating temperature range.
Stability:
After evaluating the regulator, driver and load system
using control theory it is demonstrated that the output
capacitor, external driver gain and error amplifier gain
bandwidth play an important role on the system stability. To
insure system stability the following set of design guidelines
should be followed:
C
i
C
gs
C
gd
f
1
C
i
·R
o
p
1
1
1
f
1
1
20 ·
1
a
(3 ·
p
)
·
1
g
m
R
s
(3 ·
p
)
a
·
1
g
m
C
o
·R
s
1
a
1
p
where:
f
= Driver pole frequency
C
i
= Input and reverse transfer capacitance when device
is off
R
o
= Regulator output resistance (50 for the MC33567)
p
= Secondary pole for open loop
a
= Error amplifier gain bandwidth
1
= Error amp second pole (set
1
=
a
, if not specified)
R
s
= Output capacitor ESR
g
m
= Maximum driver transconductance gain
C
o
= Output capacitance
T = Overall loop response time
MC33567
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6
The output capacitor capacitance and ESR required for
using the MTD3055VL as external driver are calculated as
follows:
f
1
C
i
·R
o
1
(1240 pF 600 pF) · (50 )
10.87 MHz
p
1
1
1
f
1
1
5MHz
1
10.87 MHz
1
3.42 MHz
1
20 ·
1
a
(3 ·
p
)
·
1
g
m
R
s
(3 ·
p
)
a
·
1
g
m
1
20 ·
1
5MHz
(3 · 3.42 MHz)
·
1
8.8 mhos
R
s
(3 · 3.42 MHz)
5MHz
·
1
8.8 mhos
3.8 m R
s
233.2 m
selecting an ESR of 30 m, we have:
C
o
5
R
s
·
1
a
1
p
C
o
5
30 m
·
1
5MHz
1
3.42 MHz
C
o
82.07 F
100 µF is selected as it is an industry standard value.
Please note that if the system is designed to work with
several drivers, the system has to be designed around the
driver with higher gain to insure stability for all of them.
The design guidelines discussed in this section are
conservative enough that satisfactory results may be
obtained with devices that lie just outside of these
guidelines, although deviation from these guidelines will
generally cause instability. For a more detailed analysis on
linear regulators stability please refer to ON Semiconductor
application note AND8037/D.
Adjustable Output Voltage:
The MC33567 will regulate V
out
to its preset voltage level,
referenced at the sense pin. However, other V
out
levels can
be obtained scaling the sense voltage. This is done using a
resistive network between the load and the sense pin as
shown in Figure 6.
Figure 6. Output Voltage Scaling Using
Resistive Network
SENSE
V
in
R2
DRV
R
INT
+
V
out(new)
+
V
out
R1
I
SENSE
1.8 k
The regulator will increase the load voltage until the
SENSE pin voltage reaches the regulator voltage level, V
out
.
The new output voltage, V
out(new)
, is calculated as follows:
V
out(new)
V
out
R
1
*
V
out
R
2
I
SENSE
Please note that in this configuration R
2
and the sense
internal resistor are in parallel. The parallel combination
will reduce the effective resistance of R
2
. If R
2
is in the range
of R
INT
, the parallel combination will be almost half of the
original intended value of R
2
. This will cause V
out(new)
to be
smaller than calculated using the above equation. This is
avoided making R
2
as small as possible, probably in the
range of 10 to 50 Ohms. V
out(new)
is limited by the external
driver drain current and its required Gate−Source voltage as
well as the Drive Output Voltage, V
drv
.
PCB Layout Guidelines
It is recommended that the MC33567 be placed as
physically close as possible to the external series pass
MOSFET transistors. Use short traces to minimize
extraneous signals from being induced on the SENSE or
DRV line. Also, avoid routing the SENSE line near the load
and input current path, as well as the GND return current
path to prevent signal coupling.

MC33567D-3R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Controllers Dual 2.5V Output w/Shutdown
Lifecycle:
New from this manufacturer.
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