© 2007 Microchip Technology Inc. DS21476C-page 7
TC820
24 20 FREQ/
VOLTS
Voltage or frequency measurement select input. When unconnected, or connected
VOLTS to DGND, the A/D converter function is active. When connected to V
DD
, the
frequency counter function is active. This pin has an internal 5 μA pull-down to DGND.
25 21 PKHOLD Peak hold input. When connected to V
DD
, the converter will only update the display if a
new conversion value is greater than the preceding value. Thus, the peak reading will be
stored and held indefinitely. When unconnected, or connected to DGND, the converter
will operate normally. This pin has an internal 5 μA pull-down to DGND.
22 UR Under range output. This output will be HIGH when the digital reading is 380 counts or
less.
23 OR Over range output. This output will be HIGH when the analog signal input is greater
than full scale. The LCD will display "OL" when the input is over ranged.
26 24 V
SS
Negative supply connection. Connect to negative terminal of 9V battery.
27 25 COM Analog circuit ground reference point. Nominally 3.3V below V
DD
.
28 26 C
REF
+ Positive connection for reference capacitor.
29 27 C
REF
- Negative connection for reference capacitor.
30 28 V
REF
+ High differential reference input connection.
31 29 V
REF
- Low differential reference input connection.
32 30 V
IN
- Low analog input signal connection.
33 31 V
IN
+ High analog input signal connection.
34 32 V
BUFF
Buffer output. Connect to integration resistor.
35 33 C
AZ
Auto-zero capacitor connection.
36 34 V
INT
Integrator output. Connect to integration capacitor.
—35EOC
/
HOLD
Bi-directional pin. Pulses low (i.e., from V
DD
to DGND) at the end of each conversion. If
connected to V
DD
, conversions will continue, but the display is not updated.
37 36 OSC1 Crystal oscillator (input) connection.
38 37 OSC2 Crystal oscillator (output) connection.
39 38 OSC3 RC oscillator connection.
40 39 V
DD
LCD segment drive for "a," "g," and "d" segments of MSD.
TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-PDIP)
Pin Number
(44-PQFP)
Symbol Description
TC820
DS21476C-page 8 © 2007 Microchip Technology Inc.
3.0 DETAILED DESCRIPTION
The is a 3-3/4 digit measurement system combining an
integrating analog-to-digital converter, frequency
counter, and logic level tester in a single package. The
TC820 supersedes the TC7106 in new designs by
improving performance and reducing system cost. The
TC820 adds features that are difficult, expensive, or
impossible to provide with older A/D converters (see
Table 3-1). The high level of integration permits TC820
based instruments to deliver higher performance and
more features, while actually reducing parts count.
Fabricated in low power CMOS, the TC820 directly
drives a 3-3/4 digit (3999 maximum) LCD.
With a maximum range of 3999 counts, the TC820
provides 10 times greater resolution in the 200 mV to
400 mV range than traditional 3-1/2 digit meters. An
auto-zero cycle ensures a zero reading with a 0V input.
CMOS processing reduces analog input bias current to
only 1 pA. Rollover error (the difference in readings for
equal magnitude but opposite polarity input signals) is
less than ±1 count. Differential reference inputs permit
ratiometric measurements for ohms or bridge
transducer applications.
The TC820's frequency counter option simplifies
design of an instrument well-suited to both analog and
digital troubleshooting: voltage, current, and resistance
measurements, plus precise frequency measurements
to 4MHz (higher frequencies can be measured with an
external prescaler), and a simple logic probe. The
frequency counter will automatically adjust its range to
match the input frequency, over a four-decade range.
Two logic level measurement inputs permit a TC820
based meter to function as a logic probe. When
combined with external level shifters, the TC820 will
display logic levels on the LCD and also turn on a
piezoelectric buzzer when the measured logic level is
low.
Other TC820 features simplify instrument design and
reduce parts count. On-chip decimal point drivers are
included, as is a low battery detection annunciator. A
piezoelectric buzzer can be controlled with an external
switch or by the logic probe inputs. Two oscillator
options are provided: a crystal can be used if high
accuracy frequency measurements are desired, or a
simple RC option can be used for low-end instruments.
A "peak reading hold" input allows the TC820 to retain
the highest A/D or frequency reading. This feature is
useful in measuring motor starting current, maximum
temperature, and similar applications.
A family of instruments can be created with the TC820.
No additional design effort is required to create
instruments with 3-3/4 digit resolution.
The TC820 operates from a single 9V battery, with
typical power of 10mW. Packages include a 40-lead
plastic DIP, 44-lead plastic flat package (PQFP), and
44-lead PLCC.
TABLE 3-1: COMPETITIVE EVALUATION
3.1 General Theory of Operation
3.1.1 DUAL SLOPE CONVERSION
PRINCIPLES
The TC820 analog-to-digital converter operates on the
principle of dual slope integration. An understanding of
the dual slope conversion technique will aid the user in
following the detailed TC820 theory of operation
following this section. A conventional dual slope con-
verter measurement cycle has two distinct phases:
1. Input Signal Integration.
2. Reference Voltage Integration (De-integration).
Referring to Figure 3-1, the unknown input signal to be
converted is integrated from zero for a fixed time period
(t
INT
), measured by counting clock pulses. A constant
reference voltage of the opposite polarity is then
integrated until the integrator output voltage returns to
zero. The reference integration (de-integration) time
(t
DEINT
) is then directly proportional to the unknown
input voltage (V
IN
).
Features Comparison TC820 7106
3-3/4 Digit Resolution Yes No
Auto-Ranging Frequency
Counter
Yes No
Logic Probe Yes No
Decimal Point Drive Yes No
Peak Reading Hold
(Frequency or Voltage)
Yes No
Display Hold Yes No
Simple 10:1 Range Change Yes No
Buzzer Drive Yes No
Low Battery Detection
with Annunciator
Yes No
Over Range Detection
with Annunciator
Yes No
Low Drift Reference Yes No
Under Range/Over Range
Logic Output
Yes No
Input Overload Display "OL" "1"
LCD Annunciator Driver Yes No
LCD Drive Type Triplexed Direct
LCD Pin Connections 15 24
LCD Elements 36 23
© 2007 Microchip Technology Inc. DS21476C-page 9
TC820
In a simple dual slope converter, a complete conver-
sion requires the integrator output to "ramp-up" from
zero and "ramp-down" back to zero. A simple mathe-
matical equation relates the input signal, reference
voltage, and integration time.
EQUATION 3-1:
For a constant V
INT
:
EQUATION 3-2:
FIGURE 3-1: Basic Dual Slope Converter.
Accuracy in a dual slope converter is unrelated to the
integrating resistor and capacitor values as long as
they are stable during a measurement cycle. An
inherent benefit of the dual slope technique is noise
immunity. Noise spikes are integrated or averaged to
zero during the integration periods, making integrating
ADCs immune to the large conversion errors that
plague successive approximation converters in high
noise environments. Interfering signals, with frequency
components at multiples of the averaging (integrating)
period, will be attenuated (Figure 3-2). Integrating
ADCs commonly operate with the signal integration
period set to a multiple of the 50/60Hz power line
period.
FIGURE 3-2: Normal Mode Rejection of
Dual Slope Converter.
3.2 Analog Section
In addition to the basic integrate and de-integrate dual
slope phases discussed above, the TC820 design
incorporates a "zero integrator output" phase and an
"auto-zero" phase. These additional phases ensure
that the integrator starts at 0V (even after a severe over
range conversion), and that all offset voltage errors
(buffer amplifier, integrator and comparator) are
removed from the conversion. A true digital zero
reading is assured without any external adjustments.
A complete conversion consists of four distinct phases:
1. Zero Integrator Output.
2. Auto-Zero.
3. Signal Integrate.
4. Reference De-integrate.
3.2.1 ZERO INTEGRATOR OUTPUT
PHASE
This phase guarantees that the integrator output is at
0V before the system zero phase is entered, ensuring
that the true system offset voltages will be compen-
sated for even after an over range conversion. The
duration of this phase is 500 counts plus the unused
de-integrate counts.
3.2.2 AUTO-ZERO PHASE
During the auto-zero phase, the differential input signal
is disconnected from the measurement circuit by
opening internal analog switches, and the internal
nodes are shorted to Analog Common (0V
REF
) to
establish a zero input condition. Additional analog
switches close a feedback loop around the integrator
and comparator to permit comparator offset voltage
error compensation. A voltage established on C
AZ
then
compensates for internal device offset voltages during
the measurement cycle. The auto-zero phase residual
is typically 10 µV to 15 mV. The auto-zero duration is
1500 counts.
1
R
INT
C
INT
t
INT
0
V
IN
(t)dt =
V
REF
t
DEINT
R
INT
C
INT
Where: V
REF
= Reference Voltage
t
INT
= Integration Time
t
DEINT
= De-integration Time
V
IN
= V
REF
t
DEINT
t
INT
+
REF
Voltage
Analog
Input Signal
+
Display
Switch
Driver
Control
Logioc
Integrator
Output
Clock
Counter
Polarity Control
Phase
Control
V
IN
= V
REF
V
IN
= 1.2V
REF
Variable Reference
Inte
g
rate Time
Fixed Signal
Integrate Time
Integrator
C
Comparator
R
30
20
10
0
0.1/T 1/T 10/
Input Frequency
Normal Mode Rejection (dB)
T = Measurement
Period

TC820CPL

Mfr. #:
Manufacturer:
Microchip Technology
Description:
LCD Drivers 3-3/4 A/D Converter
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