74AUP1G374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 29 November 2012 12 of 23
NXP Semiconductors
74AUP1G374
Low-power D-type flip-flop; positive-edge trigger; 3-state
[1] All typical values are measured at nominal V
CC
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] t
en
is the same as t
PZH
and t
PZL
.
[4] t
dis
is the same as t
PHZ
and t
PLZ
.
[5] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs;
N = number of inputs switching.
t
h
hold time D to CP; see Figure 7
V
CC
= 0.8 V - 2.8 - - - - - ns
V
CC
= 1.1 V to 1.3 V - 0.7 - 0 - 0 - ns
V
CC
= 1.4 V to 1.6 V - 0.4 - 0 - 0 - ns
V
CC
= 1.65 V to 1.95 V - 0.4 - 0 - 0 - ns
V
CC
= 2.3 V to 2.7 V - 0.3 - 0 - 0 - ns
V
CC
= 3.0 V to 3.6 V - 0.4 - 0 - 0 - ns
C
PD
power
dissipation
capacitance
V
I
= GND to V
CC
;
f
i
= 1 MHz; output enabled
[5]
V
CC
= 0.8 V - 1.7 - - - - - pF
V
CC
= 1.1 V to 1.3 V - 1.8 - - - - - pF
V
CC
= 1.4 V to 1.6 V - 1.8 - - - - - pF
V
CC
= 1.65 V to 1.95 V - 2.0 - - - - - pF
V
CC
= 2.3 V to 2.7 V - 2.3 - - - - - pF
V
CC
= 3.0 V to 3.6 V - 2.8 - - - - - pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min
(85 C)
Max
(85 C)
Min
(125 C)
Max
(125 C)
