PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 22 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
Fig 20. Definition of timing on the I
2
C-bus
t
SP
t
BUF
t
HD;STA
PP S
t
LOW
t
r
t
HD;DAT
t
f
t
HIGH
t
SU;DAT
t
SU;STA
Sr
t
HD;STA
t
SU;STO
SDA
SCL
002aaa986
0.7 × V
DD
0.3 × V
DD
0.7 × V
DD
0.3 × V
DD
Rise and fall times refer to V
IL
and V
IH
.
Fig 21. I
2
C-bus timing diagram
002aab175
protocol
START
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
bit 0
(R/W)
acknowledge
(A)
STOP
condition
(P)
SCL
SDA
t
HD;STA
t
SU;DAT
t
HD;DAT
t
f
t
BUF
t
SU;STA
t
LOW
t
HIGH
t
VD;ACK
t
SU;STO
1
/ f
SCL
t
r
t
VD;DAT
0.3 × V
DD
0.7 × V
DD
0.3 × V
DD
0.7 × V
DD
Fig 22. t
v(Q)
timing
t
v(Q)
SCL
002aad327
IOn
t
v(Q)
SCL
IOn
PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 23 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
12. Test information
R
L
= load resistor.
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance of Z
o
of the pulse generators.
Fig 23. Test circuitry for switching times
Fig 24. Load circuit
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
500 Ω
002aab284
R
T
V
I
V
DD
DUT
V
DD
open
GND
C
L
50 pF
002aac226
R
L
500 Ω
from output under test
2V
DD
open
GND
S1
R
L
500 Ω
PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 24 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
13. Package outline
Fig 25. Package outline SOT137-1 (SO24)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
c
L
v M
A
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.61
0.60
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
99-12-27
03-02-19

PCA9535BS,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders I2C/SMBUS 16BIT GPIO
Lifecycle:
New from this manufacturer.
Delivery:
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