ICS674-01
USER CONFIGURABLE DIVIDER CLOCK DIVIDER
IDT™ / ICS™
USER CONFIGURABLE DIVIDER 3
ICS674-01 REV H 051310
External Components
The ICS674-01 requires a minimum number of external components for proper operation. A 0.01µF decoupling
capacitor should be connected between each VDD and GND as close to the device as possible. A series
termination resistor of 33Ω should be used in series with OUTA and OUTB pins.
Determining (setting) the Divider
The user has full control in setting the desired divide. The user should connect the appropriate divider select input
pins directly to ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit
Board layout, ensuring that the ICS674-01 will automatically produce the correct divide when all components are
soldered. It is also possible to connect the inputs to parallel I/O ports in order to change divides. The divides of the
ICS674-01 can be determined by the following equations:
Divide A = DAW + 2
Where Divider A Word (DAW) = 1 to 127 (0 is not permitted)
Divide B = (DBW+8) x PD
Where Divider B Word (DBW) = 4 to 511 (0, 1, 2, 3 are not permitted)
Post Divider (PD) = values on page 2
For example, suppose Divide A is desired to be 61 and Divide B is desired to be 284, then DAW = 59,
DBW = 276, and PD = 1. This means A6:A0 is 0111011, B8:B0 is 100010100 and S2:S0 is 110. Since all inputs
have pull-ups, it is only necessary to ground the zero pins, namely A6, A2, B7, B6, B5, B1, B0, and S0.
These configuration pins can be changed at any time during operation.
