NCV571MN10TBG

© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 5
1 Publication Order Number:
NCP571/D
NCP571, NCV571
150 mA CMOS Low Iq Low
Output Voltage Regulator
The NCP571 series of fixed output low dropout linear regulators are
designed for handheld communication equipment and portable battery
powered applications which require low quiescent current. The
NCP571 series features an ultra−low quiescent current of 4.0 mA.
Each device contains a voltage reference unit, an error amplifier, a
PMOS power transistor, resistors for setting output voltage, current
limit, and temperature limit protection circuits.
The NCP571 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 0.1 mF. The
device is housed in the TSOP−5 or DFN6 surface mount package.
Standard voltage versions are 0.8 V, 0.9 V, 1.0 V and 1.2 V.
Features
Low Quiescent Current of 4.0 mA Typical
Maximum Operating Voltage of 12 V
Low Output Voltage Option down to 0.8 V
High Accuracy Output Voltage of 3.0%
Industrial Temperature Range of −40°C to +85°C
(NCV571, T
A
= −40°C to +125°C)
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Typical Applications
Battery Powered Instruments
Hand−Held Instruments
Camcorders and Cameras
Driver w/
Current
Limit
Vin
Vout
Thermal
Shutdown
Enable
GND
OFF
ON
1
3
5
2
+
Figure 1. Representative Block Diagram
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
TSOP−5
SN SUFFIX
CASE 483
MARKING DIAGRAMS
XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
1
5
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XXXAYWG
G
(Note: Microdot may be in either location)
1
6
DFN6
MN SUFFIX
CASE 506BA
XX MG
G
1
NCP571, NCV571
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2
TSOP−5 package
1
3
NC
V
in
2
GND
Enable
4
V
out
5
(Top View)
DFN6 package
1
3
Enable
V
out
2
NC
GND
4
V
in
6
(Top View)
EP
5
NC
PIN CONNECTIONS
PIN FUNCTION DESCRIPTION
DFN6 TSOP−5 Pin Name Description
1 5 V
out
Regulated output voltage.
2 4 NC No Internal Connection. It is recommended to connect this pin to GND potential.
3 2 GND Power supply ground.
4 3 Enable This input is used to place the device into low−power standby. When this input is
pulled low, the device is disabled. If this function is not used, Enable pin should be
connected to V
in
.
5 NC No Internal Connection. It is recommended to connect this pin to GND potential.
6 1 V
in
Positive power supply input voltage.
EP EP No Internal Connection. It is recommended to connect this pin to GND potential.
MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage V
in
0 to 12 V
Enable Voltage V
EN
−0.3 to V
in
+ 0.3 V
Output Voltage V
out
−0.3 to V
in
+ 0.3 V
Power Dissipation P
D
Internally Limited W
Operating Junction Temperature T
J
+150 °C
Operating Ambient Temperature NCP571
NCV571
T
A
−40 to +85
−40 to +125
°C
Storage Temperature T
stg
−55 to +150 °C
ESD Capability, Human Body Model (Note 1) ESD
HBM
2000 V
ESD Capability, Machine Mode (Note 1) ESD
MM
200 V
ESD Capability, Charged Device Model (Note 1) ESD
CDM
1000 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model (Jedec Standard)
2. Latchup capability (85°C) $100 mA DC with trigger voltage.
THERMAL CHARACTERISTICS
Rating Symbol Test Conditions Typical Value Unit
Junction−to−Ambient TSOP−5
R
q
JA
1 oz Copper Thickness, 100 mm
2
250 °C/W
PSIJ−Lead 2 TSOP−5
Y
J−L2
1 oz Copper Thickness, 100 mm
2
68 °C/W
Junction−to−Ambient DFN6
R
q
JA
1 oz Copper Thickness, 100 mm
2
190 °C/W
PSIJ−Lead 2 DFN6
Y
J−L2
1 oz Copper Thickness, 100 mm
2
84 °C/W
NOTE: Single component mounted on an 80 x 80 x 1.5 mm FR4 PCB with stated copper head spreading area. Using the following
boundary conditions as stated in EIA/JESD 51−1, 2, 3, 7, 12.
NCP571, NCV571
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3
Figure 2. Typical Application Schematic for TSOP−5 Package
1
2
5
4
3
C1
0.1 mF
C2
0.1 mF
V
in
GND
Enable
GND
V
out
V
out
NC
ENGND
V
in
ELECTRICAL CHARACTERISTICS
(V
in
= V
out(nom)
+ 1.0 V, V
EN
= V
in
, C
in
= 1.0 mF, C
out
= 1.0 mF, T
A
= 25°C, unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
Output Voltage (T
A
= 25°C, I
out
= 10 mA)
0.8 V
0.9 V
1.0 V
1.2 V
V
out
− 3%
0.776
0.873
0.970
1.164
0.8
0.9
1.0
1.2
+ 3%
0.824
0.927
1.030
1.236
V
Output Voltage (T
A
= −40°C to +85°C for NCP571 or T
A
= −40°C to
+125°C for NCV571, I
out
= 10 mA) (Note 5)
0.8 V
0.9 V
1.0 V
1.2 V
V
out
− 4%
0.768
0.864
0.960
1.152
0.8
0.9
1.0
1.2
+ 4%
0.832
0.936
1.040
1.248
V
Line Regulation (V
in
= V
out
+ 1.0 V to 12 V, I
out
= 10 mA) Reg
line
10 30 mV
Load Regulation (I
out
= 10 mA to 150 mA, V
in
= V
out
+ 2.0 V) Reg
load
40 65 mV
Output Current (V
out
= (V
out
at I
out
= 100 mA) − 3%)
0.8 V (V
in
= 3.0 V)
0.9 V (V
in
= 3.0 V)
1.0 V (V
in
= 3.0 V)
1.2 V (V
in
= 3.0 V)
I
o(nom)
150
150
150
150
mA
Dropout Voltage (I
out
= 10 mA, Measured at V
out
− 3.0%)
0.8 V
0.9 V
1.0 V
1.2 V
V
in
−V
out
730
650
550
350
850
750
650
450
mV
Quiescent Current
(Enable Input = 0 V)
(Enable Input = V
in
= 3 V, I
out
= 1.0 mA to 150 mA and
V
in
= Enable Input = 3 V, I
out
= 150 mA)
I
Q
0.1
4.0
1.0
8.0
uA
Output Voltage Temperature Coefficient T
c
100 ppm/°C
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
V
th(en)
1.3
0.3
V
Output Short Circuit Current (V
out
= 0 V) (Note 4)
0.8 V (V
in
= 3.0 V)
0.9 V (V
in
= 3.0 V)
1.0 V (V
in
= 3.0 V)
1.2 V (V
in
= 3.0 V)
I
out(max)
160
160
160
160
260
260
260
260
600
600
600
600
mA
3. Maximum package power dissipation limits must be observed.
P
D
+
T
J(max)
* T
A
R
qJA
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

NCV571MN10TBG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators LDO
Lifecycle:
New from this manufacturer.
Delivery:
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