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NSBC144EDP6T5G

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2017
June, 2017 − Rev. 3
19 Publication Order Number:
DTC144ED/D
MUN5213DW1,
NSBC144EDXV6,
NSBC144EDP6
Dual NPN Bias Resistor
Transistors
R1 = 47 kW, R2 = 47 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable*
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C, common for Q
1
and Q
2
, unless otherwise noted)
Rating
Symbol Max Unit
Collector-Base Voltage V
CBO
50 Vdc
Collector-Emitter Voltage V
CEO
50 Vdc
Collector Current − Continuous I
C
100 mAdc
Input Forward Voltage V
IN(fwd)
40 Vdc
Input Reverse Voltage V
IN(rev)
10 Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device Package Shipping
†
MUN5213DW1T1G,
SMUN5213DW1T1G*
SOT−363 3,000 / Tape & Reel
MUN5213DW1T3G,
NSVMUN5213DW1T3G*
SOT−363 10,000 / Tape & Reel
NSBC144EDXV6T1G SOT−563 4,000 / Tape & Reel
NSBC144EDXV6T5G SOT−563 8,000 / Tape & Reel
NSBC144EDP6T5G SOT−963 8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
www.onsemi.com
MARKING DIAGRAMS
PIN CONNECTIONS
7C/D = Specific Device Code
M = Date Code*
G = Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
SOT−363
CASE 419B−02
SOT−563
CASE 463A
Q
1
Q
2
(1)(2)(3)
(6)(5)(4)
R
1
R
2
R
2
R
1
SOT−963
CASE 527AD
D M
1
7C MG
G
1
6
7C MG
1
MUN5213DW1, NSBC144EDXV6, NSBC144EDP6
www.onsemi.com
20
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
MUN5213DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25°C (Note 13)
(Note 14)
Derate above 25°C (Note 13)
(Note 14)
P
D
187
256
1.5
2.0
mW
mW/°C
Thermal Resistance, (Note 13)
Junction to Ambient (Note 14)
R
q
JA
670
490
°C/W
MUN5213DW1 (SOT−363) BOTH JUNCTION HEATED (Note 15)
Total Device Dissipation
T
A
= 25°C (Note 13)
(Note 14)
Derate above 25°C (Note 13)
(Note 14)
P
D
250
385
2.0
3.0
mW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 13)
(Note 14)
R
q
JA
493
325
°C/W
Thermal Resistance,
Junction to Lead (Note 13)
(Note 14)
R
q
JL
188
208
°C/W
Junction and Storage Temperature Range T
J
, T
stg
−55 to +150 °C
NSBC144EDXV6 (SOT−563) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25°C (Note 13)
Derate above 25°C (Note 13)
P
D
357
2.9
mW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 13)
R
q
JA
350
°C/W
NSBC144EDXV6 (SOT−563) BOTH JUNCTION HEATED (Note 15)
Total Device Dissipation
T
A
= 25°C (Note 13)
Derate above 25°C (Note 13)
P
D
500
4.0
mW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 13)
R
q
JA
250
°C/W
Junction and Storage Temperature Range T
J
, T
stg
−55 to +150 °C
NSBC144EDP6 (SOT−963) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25°C (Note 16)
(Note 17)
Derate above 25°C (Note 16)
(Note 17)
P
D
231
269
1.9
2.2
MW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 16)
(Note 17)
R
q
JA
540
464
°C/W
NSBC144EDP6 (SOT−963) BOTH JUNCTION HEATED (Note 15)
Total Device Dissipation
T
A
= 25°C (Note 16)
(Note 17)
Derate above 25°C (Note 16)
(Note 17)
P
D
339
408
2.7
3.3
MW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 16)
(Note 17)
R
q
JA
369
306
°C/W
Junction and Storage Temperature Range T
J
, T
stg
−55 to +150 °C
13.FR−4 @ Minimum Pad.
14.FR−4 @ 1.0 × 1.0 Inch Pad.
15.Both junction heated values assume total power is sum of two equally powered channels.
16.FR−4 @ 100 mm
2
, 1 oz. copper traces, still air.
17.FR−4 @ 500 mm
2
, 1 oz. copper traces, still air.
MUN5213DW1, NSBC144EDXV6, NSBC144EDP6
www.onsemi.com
21
ELECTRICAL CHARACTERISTICS (T
A
=25°C, common for Q
1
and Q
2
, unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(V
CB
=50V, I
E
=0)
I
CBO
− − 100
nAdc
Collector-Emitter Cutoff Current
(V
CE
=50V, I
B
=0)
I
CEO
− − 500
nAdc
Emitter-Base Cutoff Current
(V
EB
= 6.0 V, I
C
=0)
I
EBO
− − 0.1
mAdc
Collector-Base Breakdown Voltage
(I
C
=10mA, I
E
=0)
V
(BR)CBO
50 − −
Vdc
Collector-Emitter Breakdown Voltage (Note 18)
(I
C
= 2.0 mA, I
B
=0)
V
(BR)CEO
50 − −
Vdc
ON CHARACTERISTICS
DC Current Gain (Note 18)
(I
C
= 5.0 mA, V
CE
=10V)
h
FE
80 140 −
Collector-Emitter Saturation Voltage (Note 18)
(I
C
= 10 mA, I
B
= 0.3 mA)
V
CE(sat)
− − 0.25
V
Input Voltage (Off)
(V
CE
= 5.0 V, I
C
= 100 mA)
V
i(off)
− 1.2 −
Vdc
Input Voltage (On)
(V
CE
= 0.2 V, I
C
= 3.0 mA)
V
i(on)
− 1.9 −
Vdc
Output Voltage (On)
(V
CC
= 5.0 V, V
B
= 3.5 V, R
L
= 1.0 kW)
V
OL
− − 0.2
Vdc
Output Voltage (Off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
V
OH
4.9 − −
Vdc
Input Resistor R1 32.9 47 61.1
kW
Resistor Ratio R
1
/R
2
0.8 1.0 1.2
18.Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
Figure 33. Derating Curve
AMBIENT TEMPERATURE (°C)
1251007550250−25−50
0
50
100
150
200
250
300
P
D
, POWER DISSIPATION (mW)
150
(1) (2)
(1) SOT−363; 1.0 × 1.0 Inch Pad
(2) SOT−563; Minimum Pad
(3) SOT−963; 100 mm
2
, 1 oz. Copper Trace
350
400
(3)
P1-P3P4-P6P7-P8

NSBC144EDP6T5G

Mfr. #:
Buy NSBC144EDP6T5G
Manufacturer:
ON Semiconductor
Description:
Bipolar Transistors - Pre-Biased SOT-963 DUAL NBRT
Lifecycle:
New from this manufacturer.
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